rk3066b: fix hsiphy array lenth

diff --git a/arch/arm/mach-rk30/clock_data-rk3066b.c b/arch/arm/mach-rk30/clock_data-rk3066b.c
index 7b9e294a94904ba24ce1a8cbd297f7274019d1ff..fe80054276ced5361aff37b36da9047d80116fad 100644 (file)
--- a/arch/arm/mach-rk30/clock_data-rk3066b.c
+++ b/arch/arm/mach-rk30/clock_data-rk3066b.c
@@ -1800,7 +1800,7 @@ static struct clk clk_otgphy1_480m = {
 
 /* hsicphy setting */
 #ifdef ARCH_RK31
-static struct clk *clk_hsicphy_parents[3] = {&clk_otgphy0_480m, &clk_otgphy1_480m, &general_pll_clk, &codec_pll_clk};
+static struct clk *clk_hsicphy_parents[4] = {&clk_otgphy0_480m, &clk_otgphy1_480m, &general_pll_clk, &codec_pll_clk};
 static struct clk clk_hsicphy_480m = {
        .name           = "hsicphy_480m",
        .parent         = &clk_otgphy0_480m,