delegates to the regular x86-32 convention which handles byval, but only
after it handles a few cases, and it's necessary to handle byval before
handling those cases. This fixes PR3122 (and rdar://
6400815), llvm-gcc
miscompiling LLVM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60453
91177308-0d34-0410-b5e6-
96231b3b80d8
]>;
def CC_X86_32_FastCC : CallingConv<[
+ // Handles byval parameters. Note that we can't rely on the delegation
+ // to CC_X86_32_Common for this because that happens after code that
+ // handles i32 arguments.
+ CCIfByVal<CCPassByVal<4, 4>>,
+
// Promote i8/i16 arguments to i32.
CCIfType<[i8, i16], CCPromoteToType<i32>>,
--- /dev/null
+; RUN: llvm-as < %s | llc | grep {movl\[\[:space:\]\]*8(%esp), %eax} | count 2
+; PR3122
+; rdar://6400815
+
+; byval requires a copy, even with fastcc.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.5"
+ %struct.MVT = type { i32 }
+
+define fastcc i32 @bar() nounwind {
+ %V = alloca %struct.MVT
+ %a = getelementptr %struct.MVT* %V, i32 0, i32 0
+ store i32 1, i32* %a
+ call fastcc void @foo(%struct.MVT* byval %V) nounwind
+ %t = load i32* %a
+ ret i32 %t
+}
+
+declare fastcc void @foo(%struct.MVT* byval)
; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep TAILCALL
-; check for the 2 byval moves
-; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep movl | grep ecx | grep eax | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep {movl\[\[:space:\]\]*4(%esp), %eax} | count 1
%struct.s = type {i32, i32, i32, i32, i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32 }