// QSAX == QSUBADDX
def : MnemonicAlias<"qsubaddx", "qsax">;
+// SASX == SADDSUBX
+def : MnemonicAlias<"saddsubx", "sasx">;
// LDRSBT/LDRHT/LDRSHT post-index offset if optional.
// Note that the write-back output register is a dummy operand for MC (it's
@ CHECK: sadd8ne r3, r4, r8 @ encoding: [0x84,0xfa,0x08,0xf3]
+@------------------------------------------------------------------------------
+@ SASX
+@------------------------------------------------------------------------------
+ saddsubx r9, r2, r7
+ it ne
+ saddsubxne r2, r5, r6
+ sasx r9, r2, r7
+ it ne
+ sasxne r2, r5, r6
+
+@ CHECK: sasx r9, r2, r7 @ encoding: [0xa2,0xfa,0x07,0xf9]
+@ CHECK: it ne @ encoding: [0x18,0xbf]
+@ CHECK: sasxne r2, r5, r6 @ encoding: [0xa5,0xfa,0x06,0xf2]
+@ CHECK: sasx r9, r2, r7 @ encoding: [0xa2,0xfa,0x07,0xf9]
+@ CHECK: it ne @ encoding: [0x18,0xbf]
+@ CHECK: sasxne r2, r5, r6 @ encoding: [0xa5,0xfa,0x06,0xf2]
+
+
@------------------------------------------------------------------------------
@ SUB (register)
@------------------------------------------------------------------------------