Support the 'J' constraint.
authorEric Christopher <echristo@apple.com>
Mon, 7 May 2012 03:13:42 +0000 (03:13 +0000)
committerEric Christopher <echristo@apple.com>
Mon, 7 May 2012 03:13:42 +0000 (03:13 +0000)
Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156280 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Mips/MipsISelLowering.cpp
test/CodeGen/Mips/inlineasm-cnstrnt-bad-J.ll [new file with mode: 0644]
test/CodeGen/Mips/inlineasm_constraint.ll

index 13665ee89a9051f1dbc107b5c4b584e4c3a6d937..97332cf00d19bb58ce6cded2b4aa926fdc3b6786 100644 (file)
@@ -3040,6 +3040,7 @@ MipsTargetLowering::getSingleConstraintMatchWeight(
       weight = CW_Register;
     break;
   case 'I': // signed 16 bit immediate
+  case 'J': // integer zero
     if (isa<ConstantInt>(CallOperandVal))
       weight = CW_Constant;
     break;
@@ -3102,6 +3103,16 @@ void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
       }
     }
     return;
+  case 'J': // integer zero
+    if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) {
+      EVT Type = Op.getValueType();
+      int64_t Val = C->getZExtValue();
+      if (Val == 0) {
+        Result = DAG.getTargetConstant(0, Type);
+        break;
+      }
+    }
+    return;
   }
 
   if (Result.getNode()) {
diff --git a/test/CodeGen/Mips/inlineasm-cnstrnt-bad-J.ll b/test/CodeGen/Mips/inlineasm-cnstrnt-bad-J.ll
new file mode 100644 (file)
index 0000000..1fdf672
--- /dev/null
@@ -0,0 +1,16 @@
+;
+;This is a negative test. The constant value given for the constraint (J)
+;is non-zero (3).
+;
+; RUN: not llc -march=mipsel < %s  2> %t
+; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
+
+define i32 @main() nounwind {
+entry:
+
+;CHECK-ERRORS: error: invalid operand for inline asm constraint 'J'
+
+  tail call i32 asm "addi $0,$1,$2", "=r,r,J"(i32 1024, i32 3) nounwind
+  ret i32 0
+}
+
index e2fbaa772ef1461ba983187886bfb91f881c93df..f053e0e2766137d80e27ad81da89e344c30e0e8c 100644 (file)
@@ -15,6 +15,12 @@ entry:
 ; CHECK: #NO_APP
    tail call i32 asm sideeffect "addi $0,$1,$2", "=r,r,I"(i32 7, i32 -3) nounwind
 
+; Now J with 0
+; CHECK: #APP
+; CHECK: addi ${{[0-9]+}},${{[0-9]+}},0
+; CHECK: #NO_APP
+  tail call i32 asm sideeffect "addi $0,$1,$2\0A\09 ", "=r,r,J"(i32 7, i16 0) nounwind
+
   ret i32 0
 }