UPSTREAM: clk: rockchip: add the new clock ids for RK3228 HDMI

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
v4.8-shared/clkids commit 2d2671ea4b35454b30a69744ce258489920e4d2b)

Change-Id: I670ae08d8cac91e0cf4985ca50e3f64916d527ba
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h
index 9ce3da8b51c33e34f54a6221bdb5c04d0c368c38..5d43ed9b05ad1521fa8a2990a22d35cf29d7403b 100644 (file)
--- a/include/dt-bindings/clock/rk3228-cru.h
+++ b/include/dt-bindings/clock/rk3228-cru.h
@@ -51,9 +51,11 @@
 #define SCLK_SDIO_SAMPLE       119
 #define SCLK_EMMC_SAMPLE       121
 #define SCLK_VOP               122
+#define SCLK_HDMI_HDCP         123
 
 /* dclk gates */
 #define DCLK_VOP               190
+#define DCLK_HDMI_PHY          191
 
 /* aclk gates */
 #define ACLK_DMAC              194
@@ -78,6 +80,8 @@
 #define PCLK_PWM               350
 #define PCLK_TIMER             353
 #define PCLK_PERI              363
+#define PCLK_HDMI_CTRL         364
+#define PCLK_HDMI_PHY          365
 
 /* hclk gates */
 #define HCLK_VOP               452