firmware: rockchip: sip: add secure register read/write

Change-Id: If1369fb63a2618d20bfe7edffdc49bd4a959f954
Signed-off-by: chenjh <chenjh@rock-chips.com>

diff --git a/drivers/firmware/rockchip_sip.c b/drivers/firmware/rockchip_sip.c
index 05b52904200334ec54c1633f18e60b34bd85c541..5dae744539da44a6fe7bcf0afe1a4968e90b867c 100644 (file)
--- a/drivers/firmware/rockchip_sip.c
+++ b/drivers/firmware/rockchip_sip.c
@@ -74,6 +74,31 @@ int rk_psci_virtual_poweroff(void)
        return res.a0;
 }
 
+u32 sip_smc_secure_reg_read(u32 addr_phy)
+{
+       struct arm_smccc_res res;
+
+       res = __invoke_sip_fn_smc(SIP_ACCESS_REG, 0, addr_phy, SECURE_REG_RD);
+       if (res.a0)
+               pr_err("%s error: %d, addr phy: 0x%x\n",
+                      __func__, (int)res.a0, addr_phy);
+
+       return res.a1;
+}
+
+int sip_smc_secure_reg_write(u32 addr_phy, u32 val)
+{
+       struct arm_smccc_res res;
+
+       res = __invoke_sip_fn_smc(SIP_ACCESS_REG, val, addr_phy, SECURE_REG_WR);
+       if (res.a0)
+               pr_err("%s error: %d, addr phy: 0x%x\n",
+                      __func__, (int)res.a0, addr_phy);
+
+       return res.a0;
+}
+
+/************************** fiq debugger **************************************/
 static u64 ft_fiq_mem_phy;
 static void __iomem *ft_fiq_mem_base;
 static void (*psci_fiq_debugger_uart_irq_tf)(void *reg_base, u64 sp_el1);

diff --git a/include/linux/rockchip/rockchip_sip.h b/include/linux/rockchip/rockchip_sip.h
index d695490c8a48945e2bb4075ec309d5ad72c0b0c9..92a28c669e9736c10bc994d8576d97b9518a0e79 100644 (file)
--- a/include/linux/rockchip/rockchip_sip.h
+++ b/include/linux/rockchip/rockchip_sip.h
@@ -21,11 +21,16 @@
 #define SIP_SVC_VERSION                        0x8200ff03
 
 #define SIP_ATF_VERSION32              0x82000001
+#define SIP_ACCESS_REG                 0x82000002
 #define SIP_SUSPEND_MODE32             0x82000003
 #define SIP_DDR_CFG32                  0x82000008
 #define SIP_SHARE_MEM32                        0x82000009
 #define SIP_SIP_VERSION32              0x8200000a
 
+/* SIP_ACCESS_REG read/write */
+#define SECURE_REG_RD                  0x0
+#define SECURE_REG_WR                  0x1
+
 /* Share mem page types */
 typedef enum {
        SHARE_PAGE_TYPE_INVALID = 0,
@@ -86,6 +91,8 @@ struct arm_smccc_res sip_smc_ddr_cfg(u32 arg0, u32 arg1,
                                     u32 arg2);
 struct arm_smccc_res sip_smc_get_share_mem_page(u32 page_num,
                                                share_page_type_t page_type);
+u32 sip_smc_secure_reg_read(u32 addr_phy);
+int sip_smc_secure_reg_write(u32 addr_phy, u32 val);
 
 void psci_enable_fiq(void);
 u32 rockchip_psci_smc_get_tf_ver(void);