Autogen a few new ppc-specific nodes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23985 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index d299b79104b6da29bafa1aba29e8ac2bf9274ee3..138ac9d3699e80b12028b0a996e2dc71203d34bf 100644 (file)
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -903,18 +903,6 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
                          Select(N->getOperand(1)), Select(N->getOperand(2)));
     return SDOperand(N, 0);
   }
-  case PPCISD::FCFID:
-    CurDAG->SelectNodeTo(N, PPC::FCFID, N->getValueType(0),
-                         Select(N->getOperand(0)));
-    return SDOperand(N, 0);
-  case PPCISD::FCTIDZ:
-    CurDAG->SelectNodeTo(N, PPC::FCTIDZ, N->getValueType(0),
-                         Select(N->getOperand(0)));
-    return SDOperand(N, 0);
-  case PPCISD::FCTIWZ:
-    CurDAG->SelectNodeTo(N, PPC::FCTIWZ, N->getValueType(0),
-                         Select(N->getOperand(0)));
-    return SDOperand(N, 0);
   case ISD::FADD: {
     MVT::ValueType Ty = N->getValueType(0);
     if (!NoExcessFPPrecision) {  // Match FMA ops

diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index 0ca271d6317ee3a3ca7aca0ee34de4831b73f63b..62a2d28a90d4010414665bd383628a48ca94c68b 100644 (file)
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -14,6 +14,14 @@
 
 include "PPCInstrFormats.td"
 
+//===----------------------------------------------------------------------===//
+// PowerPC specific DAG Nodes.
+//
+
+def PPCfcfid  : SDNode<"PPCISD::FCFID" , SDTFPUnaryOp, []>;
+def PPCfctidz : SDNode<"PPCISD::FCTIDZ", SDTFPUnaryOp, []>;
+def PPCfctiwz : SDNode<"PPCISD::FCTIWZ", SDTFPUnaryOp, []>;
+
 
 //===----------------------------------------------------------------------===//
 // PowerPC specific transformation functions and pattern fragments.
@@ -449,13 +457,13 @@ def LFDX   : XForm_25<31, 599, (ops F8RC:$dst, GPRC:$base, GPRC:$index),
 }
 def FCFID  : XForm_26<63, 846, (ops F8RC:$frD, F8RC:$frB),
                       "fcfid $frD, $frB", FPGeneral,
-                      []>, isPPC64;
+                      [(set F8RC:$frD, (PPCfcfid F8RC:$frB))]>, isPPC64;
 def FCTIDZ : XForm_26<63, 815, (ops F8RC:$frD, F8RC:$frB),
                       "fctidz $frD, $frB", FPGeneral,
-                      []>, isPPC64;
+                      [(set F8RC:$frD, (PPCfctidz F8RC:$frB))]>, isPPC64;
 def FCTIWZ : XForm_26<63, 15, (ops F8RC:$frD, F8RC:$frB),
                       "fctiwz $frD, $frB", FPGeneral,
-                      []>;
+                      [(set F8RC:$frD, (PPCfctiwz F8RC:$frB))]>;
 def FRSP   : XForm_26<63, 12, (ops F4RC:$frD, F8RC:$frB),
                       "frsp $frD, $frB", FPGeneral,
                       [(set F4RC:$frD, (fround F8RC:$frB))]>;