camsys_drv: v0.d.0

diff --git a/drivers/media/video/rk_camsys/camsys_internal.h b/drivers/media/video/rk_camsys/camsys_internal.h
index ba57c84932ea01b7fc765c80c031f96e779af621..1ebb947158a816232c79bd6483bfeba0c430fc57 100755 (executable)
--- a/drivers/media/video/rk_camsys/camsys_internal.h
+++ b/drivers/media/video/rk_camsys/camsys_internal.h
@@ -78,9 +78,11 @@
 *v0.b.0:
                 1) control ddr freq by marvin self other than by clk unit. 
 *v0.c.0:
-                1) add flash_trigger_out control
+*        1) add flash_trigger_out control
+*v0.d.0:
+*        1) add Isp_SoftRst for rk3288;
 */
-#define CAMSYS_DRIVER_VERSION                   KERNEL_VERSION(0,0xc,0)
+#define CAMSYS_DRIVER_VERSION                   KERNEL_VERSION(0,0xd,0)
 
 
 #define CAMSYS_PLATFORM_DRV_NAME                "RockChip-CamSys"

diff --git a/drivers/media/video/rk_camsys/camsys_soc_priv.c b/drivers/media/video/rk_camsys/camsys_soc_priv.c
index a77accf20f649eca13a7ee28c887dab1e7aa814c..c1c22ebf7d088a11fe4c1498d8ff5a0a57995886 100755 (executable)
--- a/drivers/media/video/rk_camsys/camsys_soc_priv.c
+++ b/drivers/media/video/rk_camsys/camsys_soc_priv.c
@@ -37,9 +37,15 @@ static int camsys_rk3288_cfg (camsys_soc_cfg_t cfg_cmd, void* cfg_para)
             break;
         }
 
-        case Isp_SoftRst:
+        case Isp_SoftRst:         /* ddl@rock-chips.com: v0.d.0 */
         {
+            para_int = (unsigned int*)cfg_para;
 
+            if (para_int)
+                cru_writel(0x40004000,0x1d0);
+            else 
+                cru_writel(0x40000000,0x1d0);
+            camsys_trace(1, "Isp_SoftRst: %d",para_int);
             break;
         }
 

diff --git a/drivers/media/video/rk_camsys/camsys_soc_rk3288.h b/drivers/media/video/rk_camsys/camsys_soc_rk3288.h
index 8a5764b659b13444805095b52ecc001dd3d5d8be..5de3daa33d89a6efe71386f86c1b38a823d30e31 100755 (executable)
--- a/drivers/media/video/rk_camsys/camsys_soc_rk3288.h
+++ b/drivers/media/video/rk_camsys/camsys_soc_rk3288.h
@@ -97,6 +97,9 @@
 #define read_grf_reg(addr)                 __raw_readl(addr+RK_GRF_VIRT)
 #define mask_grf_reg(addr, msk, val)       write_grf_reg(addr,(val)|((~(msk))&read_grf_reg(addr)))
 
+#define cru_writel(v, o)       do {writel(v, RK_CRU_VIRT + (o)); dsb();} \
+                               while (0)
+
 #define write_csihost_reg(addr, val)       __raw_writel(val, addr+IOMEM(phy_virt))
 #define read_csihost_reg(addr)             __raw_readl(addr+IOMEM(phy_virt))