rk3368 camera: hold vio0 noc clock during the camera work, fixed isp iommu stall...
authorCMY <cmy@rock-chips.com>
Thu, 28 May 2015 03:40:32 +0000 (11:40 +0800)
committerdalon.zhang <dalon.zhang@rock-chips.com>
Mon, 8 Jun 2015 08:08:53 +0000 (16:08 +0800)
<6>[  142.697985] Enable stall request failed, MMU status is 0x00000011
<6>[  142.698006] rk_iommu ff914000.isp_mmu: (isp_mmu), rockchip_iommu_disable failed

Signed-off-by: CMY <cmy@rock-chips.com>
Tested-by: GY <gy@rock-chips.com>
arch/arm64/boot/dts/rk3368.dtsi
drivers/media/video/rk_camsys/camsys_internal.h
drivers/media/video/rk_camsys/camsys_marvin.c
drivers/media/video/rk_camsys/camsys_marvin.h

index f65097e21a705335cdb259f77bb8090d4039dfb5..00f649f6f812eba3be09b87c2a9e56abb776b62b 100644 (file)
                compatible = "rockchip,isp";
                reg = <0x0 0xff910000 0x0 0x10000>;
                interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&clk_gates16 0>, <&clk_gates16 14>, <&clk_isp>, <&clk_isp>, <&pclk_isp>, <&clk_vip>, <&clk_vip_pll>, <&clk_gates17 4>, <&clk_gates22 11>, <&pd_isp>;
-               clock-names = "aclk_isp", "hclk_isp", "clk_isp", "clk_isp_jpe", "pclkin_isp", "clk_cif_out", "clk_cif_pll", "hclk_mipiphy1", "pclk_dphyrx", "pd_isp";
+               clocks = <&clk_gates16 0>, <&clk_gates16 14>, <&clk_isp>, <&clk_isp>, <&pclk_isp>, <&clk_vip>, <&clk_vip_pll>, <&clk_gates17 4>, <&clk_gates22 11>, <&pd_isp>, <&clk_gates16 9>;
+               clock-names = "aclk_isp", "hclk_isp", "clk_isp", "clk_isp_jpe", "pclkin_isp", "clk_cif_out", "clk_cif_pll", "hclk_mipiphy1", "pclk_dphyrx", "pd_isp", "clk_vio0_noc";
                pinctrl-names = "default", "isp_dvp8bit2", "isp_dvp10bit", "isp_dvp12bit", "isp_dvp8bit0", "isp_mipi_fl", "isp_mipi_fl_prefl","isp_flash_as_gpio","isp_flash_as_trigger_out";
                pinctrl-0 = <&cif_clkout>;
                pinctrl-1 = <&cif_clkout &isp_dvp_d2d9>;
index 39f24c524aa45357722561429d2444df2957fe89..4987a36a96f89454e089cd45c465c78ab256066c 100755 (executable)
          2) add rl3369 pd_isp enable/disable.
 *v0.0x1f.0:
                 1) GPIO(gpio7 GPIO_B5) is EBUSY when register after factory reset, but after power on ,it's normal.
+*v0.0x20.0:
+         1) rk3368 camera: hold vio0 noc clock during the camera work, fixed isp iommu stall failed.
 */
-#define CAMSYS_DRIVER_VERSION                   KERNEL_VERSION(0,0x1f,0)
+#define CAMSYS_DRIVER_VERSION                   KERNEL_VERSION(0,0x20,0)
 
 
 #define CAMSYS_PLATFORM_DRV_NAME                "RockChip-CamSys"
index 19d1bf200c522a9b2b084a3cb1d3231d9d0e9809..a841b03af965df0456699f131129f094e6e5e940 100755 (executable)
@@ -341,6 +341,7 @@ static int camsys_mrv_clkin_cb(void *ptr, unsigned int on)
 
                        clk_prepare_enable(clk->cif_clk_out);
                        clk_prepare_enable(clk->pclk_dphyrx);
+                       clk_prepare_enable(clk->clk_vio0_noc);
                }else{
                        clk_prepare_enable(clk->clk_mipi_24m);          
                }
@@ -361,6 +362,7 @@ static int camsys_mrv_clkin_cb(void *ptr, unsigned int on)
                if(CHIP_TYPE == 3368){
                clk_disable_unprepare(clk->cif_clk_out);
                        clk_disable_unprepare(clk->pclk_dphyrx);
+                       clk_disable_unprepare(clk->clk_vio0_noc);
 
                }else{
                clk_disable_unprepare(clk->clk_mipi_24m); 
@@ -532,6 +534,9 @@ static int camsys_mrv_remove_cb(struct platform_device *pdev)
         if (!IS_ERR_OR_NULL(mrv_clk->cif_clk_out)) {
             devm_clk_put(&pdev->dev,mrv_clk->cif_clk_out);
         }
+        if (!IS_ERR_OR_NULL(mrv_clk->clk_vio0_noc)) {
+            devm_clk_put(&pdev->dev,mrv_clk->clk_vio0_noc);
+        }
 
         kfree(mrv_clk);
         mrv_clk = NULL;
@@ -567,11 +572,12 @@ int camsys_mrv_probe_cb(struct platform_device *pdev, camsys_dev_t *camsys_dev)
            mrv_clk->cif_clk_out = devm_clk_get(&pdev->dev, "clk_cif_out");
            mrv_clk->cif_clk_pll = devm_clk_get(&pdev->dev, "clk_cif_pll");
            mrv_clk->pclk_dphyrx = devm_clk_get(&pdev->dev, "pclk_dphyrx");    
-           
+           mrv_clk->clk_vio0_noc = devm_clk_get(&pdev->dev, "clk_vio0_noc");
+
                if (IS_ERR_OR_NULL(mrv_clk->aclk_isp) || IS_ERR_OR_NULL(mrv_clk->hclk_isp) ||
                IS_ERR_OR_NULL(mrv_clk->isp) || IS_ERR_OR_NULL(mrv_clk->isp_jpe) || IS_ERR_OR_NULL(mrv_clk->pclkin_isp) || 
                IS_ERR_OR_NULL(mrv_clk->cif_clk_out) || IS_ERR_OR_NULL(mrv_clk->pclk_dphyrx)||
-               IS_ERR_OR_NULL(mrv_clk->pd_isp)) {
+               IS_ERR_OR_NULL(mrv_clk->pd_isp) || IS_ERR_OR_NULL(mrv_clk->clk_vio0_noc)) {
                camsys_err("Get %s clock resouce failed!\n",miscdev_name);
                err = -EINVAL;
                goto clk_failed;
@@ -660,6 +666,9 @@ clk_failed:
                if (!IS_ERR_OR_NULL(mrv_clk->pclk_dphyrx)) {
                    clk_put(mrv_clk->pclk_dphyrx);
                }
+               if (!IS_ERR_OR_NULL(mrv_clk->clk_vio0_noc)) {
+                       clk_put(mrv_clk->clk_vio0_noc);
+               }
                }
 
         kfree(mrv_clk);
index 1c70febf8666e779345cbe53dd3d33a1df139b33..31a0fc79e6802ca59cce30dae73176642c0f9572 100755 (executable)
@@ -51,6 +51,7 @@ typedef struct camsys_mrv_clk_s {
     struct clk      *isp_jpe;
     struct clk      *pclkin_isp;
     struct clk      *clk_mipi_24m;
+    struct clk      *clk_vio0_noc;
     bool             in_on;
 
     struct clk      *cif_clk_out;