help \r
default size is 64MB,and "swap" size is (128 - 64)MB.if you config this size up to 128MB,then "swap" funtion will disable. \r
\r
+config MTD_RKNAND_BUFFER \r
+ tristate "RK29 Nand buffer write enables" \r
+ depends on MTD_RKNAND \r
+ default y \r
+ help \r
+ \r
config MTD_NAND_RK29XX_DEBUG \r
tristate "RK29 Nand driver debug enables" \r
depends on MTD_RKNAND \r
obj-$(CONFIG_MTD_NAND_RK29XX) += flash.o\r
obj-$(CONFIG_MTD_NAND_RK29XX) += ftl.o\r
obj-$(CONFIG_MTD_NAND_RK29XX) += rknand_base.o\r
+obj-$(CONFIG_MTD_RKNAND_BUFFER) += rknand_buffer.o\r
+\r
#obj-$(CONFIG_MTD_UBI) += ubi/\r
-$(obj)/flash.o: $(obj)/flash.uu\r
- uudecode $(obj)/flash.uu -o $(obj)/flash.o\r
-$(obj)/ftl.o: $(obj)/ftl.uu\r
- uudecode $(obj)/ftl.uu -o $(obj)/ftl.o\r
+#$(obj)/flash.o: $(obj)/flash.uu\r
+# uudecode $(obj)/flash.uu -o $(obj)/flash.o\r
+#$(obj)/ftl.o: $(obj)/ftl.uu\r
+# uudecode $(obj)/ftl.uu -o $(obj)/ftl.o\r
+#$(obj)/rknand_buffer.o: $(obj)/rknand_buffer.uu\r
+# uudecode $(obj)/rknand_buffer.uu -o $(obj)/rknand_buffer.o
\ No newline at end of file
˵ Ã÷:ÉϵçÖ»Ðèµ÷ÓÃÒ»´Î³õʼ»¯¼´¿É\r
***************************************************************************/\r
extern int FtlInit(unsigned int nandcBaseAddr,unsigned char pageRemapEn);\r
+extern int FTLInit_WithoutPageRemap(void);\r
extern int FTLInit(void);\r
\r
\r
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end
\r
#ifdef CONFIG_MTD_NAND_RK29XX_DEBUG\r
#undef RKNAND_DEBUG\r
+#define DEBUG_MSG\r
#define RKNAND_DEBUG(format, arg...) \\r
printk(KERN_NOTICE format, ## arg);\r
#else\r
#include <asm/mach/flash.h>\r
#include "api_flash.h"\r
\r
+extern int rknand_queue_read(int Index, int nSec, void *buf);\r
+extern int rknand_queue_write(int Index, int nSec, void *buf,int mode);\r
+extern int rknand_buffer_init(void);\r
+extern void rknand_buffer_shutdown(void);\r
\r
#define DRIVER_NAME "rk29xxnand"\r
-\r
+const char rknand_base_version[] = "rknand_base.c version: 4.20 20101118";\r
#define NAND_DEBUG_LEVEL0 0\r
#define NAND_DEBUG_LEVEL1 1\r
#define NAND_DEBUG_LEVEL2 2\r
#define NAND_DEBUG_LEVEL3 3\r
-long FTLWriteCount =0;\r
-long FTLReadWriteTime =0;\r
-long FTLSwapWriteCount =0;\r
-long FTLPageWriteCount =0;\r
-\r
+//#define PAGE_REMAP\r
\r
#ifndef CONFIG_RKFTL_PAGECACHE_SIZE\r
#define CONFIG_RKFTL_PAGECACHE_SIZE 64 //¶¨ÒåpageÓ³ÉäÇø´óС£¬µ¥Î»ÎªMB,mount ÔÚ/data/dataÏ¡£\r
#endif\r
\r
-#define use_image\r
-\r
-#ifdef use_image\r
unsigned long SysImageWriteEndAdd = 0;\r
int g_num_partitions = 0;\r
-#endif\r
\r
#ifdef CONFIG_MTD_NAND_RK29XX_DEBUG\r
static int s_debug = CONFIG_MTD_NAND_RK29XX_DEBUG_VERBOSE;\r
-//module_param(s_debug, int, 0);\r
-//MODULE_PARM_DESC(s_debug, "Set Debug Level 0=quiet, 5=noisy");\r
#undef NAND_DEBUG\r
-/*#define NAND_DEBUG(n, format, arg...) \\r
- if (n <= s_debug) { \\r
- printk(KERN_NOTICE __FILE__ ":%s(): " format "\n", __FUNCTION__ , ## arg); \\r
- }*/\r
#define NAND_DEBUG(n, format, arg...) \\r
if (n <= s_debug) { \\r
printk(format,##arg); \\r
static const int s_debug = 0;\r
#endif\r
\r
-long RkFtlWriteCount;\r
-\r
/*\r
* RK28 LBA PARTITIONS,the size and offset value below is default value in this program,\r
* when RK28 LBA FLASH init,the value will be modify to the value in the nand flash.\r
*/\r
-#define MAX_FLASH_PARTITION 2\r
-\r
-#define ROOTFS_PART_SIZE 300\r
-#define PARA_PART_SIZE 1\r
-#define KERNEL_PART_SIZE 4\r
-\r
static struct mtd_partition rk28_partition_info[] = {\r
{ \r
name: "misc",\r
\r
};\r
\r
-\r
+#ifdef PAGE_REMAP\r
static struct mtd_partition rk28_page_part_info[] = {\r
{ \r
name: "pagecache",\r
offset: 0,\r
- size: CONFIG_RKFTL_PAGECACHE_SIZE * 0x800,//32MB\r
+ size: CONFIG_RKFTL_PAGECACHE_SIZE * 0x800*0x200,//32MB\r
},\r
\r
{ \r
name: "swap",\r
- offset: (CONFIG_RKFTL_PAGECACHE_SIZE) * 0x800,\r
- size: 64 * 0x800,//64MB\r
+ offset: (CONFIG_RKFTL_PAGECACHE_SIZE) * 0x800*0x200,\r
+ size: 64 * 0x800*0x200,//64MB\r
},\r
};\r
-\r
+#endif\r
/*\r
* onenand_state_t - chip states\r
* Enumeration for OneNAND flash chip state\r
};\r
\r
struct rknand_info * gpNandInfo;\r
+\r
+#include <linux/proc_fs.h>\r
+#include <linux/version.h>\r
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26))\r
+#define NANDPROC_ROOT (&proc_root)\r
+#else\r
+#define NANDPROC_ROOT NULL\r
+#endif\r
+\r
+static struct proc_dir_entry *my_proc_entry;\r
+extern int rkNand_proc_ftlread(char *page);\r
+extern int rkNand_proc_bufread(char *page);\r
+static int rkNand_proc_read(char *page,\r
+ char **start,\r
+ off_t offset, int count, int *eof, void *data)\r
+{\r
+ char *buf = page;\r
+ int step = offset;\r
+ *(int *)start = 1;\r
+ if(step == 0)\r
+ {\r
+ buf += sprintf(buf, "%s\n", rknand_base_version);\r
+ buf += rkNand_proc_ftlread(buf);\r
+#ifdef CONFIG_MTD_RKNAND_BUFFER\r
+ buf += rkNand_proc_bufread(buf);\r
+#endif \r
+ }\r
+ return buf - page < count ? buf - page : count;\r
+}\r
+\r
+static void rk28nand_create_procfs(void)\r
+{\r
+ /* Install the proc_fs entry */\r
+ my_proc_entry = create_proc_entry("rk29xxnand",\r
+ S_IRUGO | S_IFREG,\r
+ NANDPROC_ROOT);\r
+\r
+ if (my_proc_entry) {\r
+ my_proc_entry->write_proc = NULL;\r
+ my_proc_entry->read_proc = rkNand_proc_read;\r
+ my_proc_entry->data = NULL;\r
+ } \r
+}\r
+\r
+void rkNand_cond_resched(void)\r
+{\r
+ if(gpNandInfo->rknand.rknand_schedule_enable == 1)\r
+ {\r
+ //msleep(1);\r
+ //mdelay(1);\r
+ cond_resched();\r
+ }\r
+}\r
+\r
+#ifdef CONFIG_MTD_RKNAND_BUFFER\r
+static int rk28xxnand_read(struct mtd_info *mtd, loff_t from, size_t len,\r
+ size_t *retlen, u_char *buf)\r
+{\r
+ int ret = 0;\r
+ int sector = len>>9;\r
+ int LBA = (int)(from>>9);\r
+ //printk("rk28xxnand_read: from=%x,len=%x,\n",(int)from,len);\r
+ if(sector)\r
+ {\r
+ ret = rknand_queue_read(LBA, sector, buf);\r
+ }\r
+ *retlen = len;\r
+ return 0;//ret;\r
+}\r
+\r
+static int rk28xxnand_write(struct mtd_info *mtd, loff_t from, size_t len,\r
+ size_t *retlen, const u_char *buf)\r
+{\r
+ int ret = 0;\r
+ int sector = len>>9;\r
+ int LBA = (int)(from>>9);\r
+ //printk("*");\r
+ //printk(KERN_NOTICE "write: from=%lx,len=%x\n",(int)from,len);\r
+ if(sector)// cmy\r
+ {\r
+ if(LBA < SysImageWriteEndAdd)//0x4E000)\r
+ {\r
+ printk(">>> FtlWriteImage: LBA=0x%08X sector=%d\n",LBA, sector);\r
+ ret = rknand_queue_write(LBA, sector, (void *)buf,1);\r
+ }\r
+ else\r
+ {\r
+ ret = rknand_queue_write(LBA, sector, (void *)buf,0);\r
+ }\r
+ }\r
+ *retlen = len;\r
+ return 0;//ret;\r
+}\r
+#else\r
+\r
+void rknand_queue_cond_resched(void)\r
+{\r
+ ;\r
+}\r
+\r
static int rknand_get_device(int new_state)\r
{\r
struct rknand_chip *nand_info = &gpNandInfo->rknand;\r
wake_up(&nand_info->wq);\r
}\r
\r
-void rkNand_cond_resched(void)\r
-{\r
- if(gpNandInfo->rknand.rknand_schedule_enable == 1)\r
- {\r
- //msleep(1);\r
- //mdelay(1);\r
- cond_resched();\r
- }\r
-}\r
-\r
static int rk28xxnand_read(struct mtd_info *mtd, loff_t from, size_t len,\r
size_t *retlen, u_char *buf)\r
{\r
int ret = 0;\r
int sector = len>>9;\r
int LBA = (int)(from>>9);\r
- //printk(KERN_NOTICE "read: from=%x,len=%x,\n",(int)from,len);\r
- NAND_DEBUG(NAND_DEBUG_LEVEL1,"-");\r
- //FTLReadWriteTime++;\r
- //if(len&511)\r
- // printk("rk28xxnand_read: from=%x,len=%x,\n",(int)from,len);\r
rknand_get_device(FL_READING);\r
if(sector)\r
{\r
return 0;//ret;\r
}\r
\r
-// cmy: before cache part use FtlWriteImage, after cache(include cache) use FtlWrite\r
-static int write_Image(int LBA, int sector, u_char* buf)\r
-{\r
- int remain_sector = sector;\r
- int write_sector = 0;\r
- u_char* data = buf;\r
- int index = LBA;\r
- int ret = 0;\r
- while(remain_sector > 0)\r
- {\r
- write_sector = remain_sector>32?32:remain_sector;\r
- ret = FtlWriteImage(index, write_sector, data);\r
- data += write_sector<<9;\r
- index += write_sector;\r
- remain_sector -= write_sector;\r
- }\r
- return ret;\r
-}\r
-\r
static int rk28xxnand_write(struct mtd_info *mtd, loff_t from, size_t len,\r
- size_t *retlen, u_char *buf)\r
+ size_t *retlen, const u_char *buf)\r
{\r
int ret = 0;\r
int sector = len>>9;\r
int LBA = (int)(from>>9);\r
//NAND_DEBUG(NAND_DEBUG_LEVEL0,"+");\r
- FTLWriteCount+=sector;\r
- FTLReadWriteTime++;\r
- //dump_stack();\r
//printk(KERN_NOTICE "write: from=%lx,len=%x\n",(int)from,len);\r
rknand_get_device(FL_WRITING);\r
if(sector)// cmy\r
{\r
-#ifdef use_image\r
if(LBA < SysImageWriteEndAdd)//0x4E000)\r
{\r
printk(">>> FtlWriteImage: LBA=0x%08X sector=%d\n",LBA, sector);\r
- \r
- ret = FtlWriteImage(LBA&0xFFFFFFE0, sector, buf);// LBA align to 32\r
+ ret = FtlWriteImage(LBA&0xFFFFFFE0, sector, (void *)buf);// LBA align to 32\r
}\r
-#else\r
- if(LBA<0x4E000)\r
- ret = write_Image(LBA, sector, buf);\r
-#endif\r
else\r
{\r
- ret = FtlWrite(2,LBA, sector, buf);\r
+ ret = FtlWrite(2,LBA, sector, (void *)buf);\r
}\r
}\r
rknand_release_device();\r
*retlen = len;\r
return 0;//ret;\r
}\r
+#endif\r
\r
+#ifdef PAGE_REMAP\r
static int rk28xxnand_page_write(struct mtd_info *mtd, loff_t from, size_t len,\r
- size_t *retlen, u_char *buf)\r
+ size_t *retlen, const u_char *buf)\r
{\r
int ret = 0;\r
int sector = len;\r
int LBA = (int)(from);\r
NAND_DEBUG(NAND_DEBUG_LEVEL1,"*");\r
- FTLWriteCount+=sector;\r
//printk("+");\r
//printk(KERN_NOTICE "pagewrite: from=%lx,len=%x\n",(int)from,len);\r
rknand_get_device(FL_WRITING);\r
if(sector)// cmy\r
{\r
- ret = FtlPageWrite(LBA, sector, buf);\r
+ ret = FtlPageWrite(LBA, sector, (void *)buf);\r
}\r
rknand_release_device();\r
*retlen = len;\r
}\r
\r
static int rk28xxnand_page_read(struct mtd_info *mtd, loff_t from, size_t len,\r
- size_t *retlen, u_char *buf)\r
+ size_t *retlen, u_char *buf)\r
{\r
int ret = 0;\r
int sector = len;\r
int LBA = (int)(from);\r
- //printk(KERN_NOTICE "read: from=%x,len=%x,\n",(int)from,len);\r
NAND_DEBUG(NAND_DEBUG_LEVEL2,"-");\r
//printk("-");\r
//if(len&511)\r
rknand_get_device(FL_READING);\r
if(sector)\r
{\r
- ret = FtlPageRead(LBA, sector, buf);\r
+ ret = FtlPageRead(LBA, sector,(void *) buf);\r
}\r
rknand_release_device();\r
*retlen = len;\r
return 0;//ret;\r
}\r
-\r
+#endif\r
\r
static int rk28xxnand_erase(struct mtd_info *mtd, struct erase_info *instr)\r
{\r
int ret = 0;\r
if (instr->callback)\r
instr->callback(instr);\r
- NAND_DEBUG(NAND_DEBUG_LEVEL0,"rk28xxnand_erase,add:%x,len:%x\n",instr->addr,instr->len);\r
- return ret;\r
-}\r
-\r
-static int rk28xxnand_read_oob(struct mtd_info *mtd, loff_t from,\r
- struct mtd_oob_ops *ops)\r
-{\r
- int ret = 0;\r
- NAND_DEBUG(NAND_DEBUG_LEVEL0,"rk28xxnand_read_oob\n");\r
- return ret;\r
-}\r
-\r
-\r
-static int rk28xxnand_write_oob(struct mtd_info *mtd, loff_t to,\r
- struct mtd_oob_ops *ops)\r
-{\r
- int ret=0;\r
- NAND_DEBUG(NAND_DEBUG_LEVEL0,"rk28xxnand_write_oob\n");\r
+ NAND_DEBUG(NAND_DEBUG_LEVEL0,"rk28xxnand_erase,add:0x%012llx,len:0x%012llx\n",instr->addr,instr->len);\r
return ret;\r
}\r
\r
-static int rk28xxnand_suspend(struct platform_device *dev, pm_message_t pm)\r
-{\r
- gpNandInfo->rknand.rknand_schedule_enable = 0;\r
- NAND_DEBUG(NAND_DEBUG_LEVEL0,"rk28xx_nand_suspend: \n");\r
- return 0;\r
-}\r
-\r
-static int rk28xxnand_resume(struct platform_device *dev)\r
-{\r
- gpNandInfo->rknand.rknand_schedule_enable = 1;\r
- NAND_DEBUG(NAND_DEBUG_LEVEL0,"rk28xx_nand_resume: \n");\r
- return 0;\r
-}\r
-\r
-static int rk28xxnand_block_isbad(struct mtd_info *mtd, loff_t ofs)\r
-{\r
- //printk("rk28xxnand_block_isbad: \n");\r
- return 0;\r
-}\r
-\r
-static int rk28xxnand_block_markbad(struct mtd_info *mtd, loff_t ofs)\r
-{\r
- NAND_DEBUG(NAND_DEBUG_LEVEL0,"rk28xxnand_block_markbad: \n");\r
- return 0;\r
-}\r
-\r
static void rk28xxnand_sync(struct mtd_info *mtd)\r
{\r
- /* Grab the lock and see if the device is available */\r
- rknand_get_device(FL_SYNCING);\r
- /* Release it and go back */\r
- rknand_release_device();\r
NAND_DEBUG(NAND_DEBUG_LEVEL0,"rk28xxnand_sync: \n");\r
}\r
\r
-static int rk28xxnand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)\r
-{\r
- NAND_DEBUG(NAND_DEBUG_LEVEL0,"rk28xxnand_lock: \n");\r
- return 0;\r
-}\r
-\r
-static int rk28xxnand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)\r
-{\r
- NAND_DEBUG(NAND_DEBUG_LEVEL0,"rk28xxnand_unlock: \n");\r
- return 0;\r
-}\r
-\r
static int rk28xxnand_init(struct rknand_info *nand_info)\r
{\r
struct mtd_info *mtd = &nand_info->mtd;\r
- struct mtd_info *page_mtd = &nand_info->page_mtd;\r
struct rknand_chip *rknand = &nand_info->rknand;\r
+#ifdef PAGE_REMAP\r
+ struct mtd_info *page_mtd = &nand_info->page_mtd;\r
+#endif \r
\r
rknand->state = FL_READY;\r
rknand->rknand_schedule_enable = 1;\r
rknand->pFlashCallBack = NULL;\r
init_waitqueue_head(&rknand->wq);\r
NAND_DEBUG(NAND_DEBUG_LEVEL0,"FTLInit ...: \n");\r
- if(FTLInit())\r
+#ifdef PAGE_REMAP\r
+ if(FTLInit())\r
+#else\r
+ if(FTLInit_WithoutPageRemap())\r
+#endif\r
{\r
NAND_DEBUG(NAND_DEBUG_LEVEL0,"FTLInit Error: \n");\r
return -ENXIO;\r
mtd->oobsize = 0;\r
mtd->oobavail = 0;\r
mtd->ecclayout = 0;\r
- mtd->erasesize = FlashGetPageSize()*0x200; //sector\r
- mtd->writesize = FlashGetPageSize()*0x200;\r
+ mtd->erasesize = 8*0x200; //sectorFlashGetPageSize()\r
+ mtd->writesize = 8*0x200; //FlashGetPageSize()\r
\r
// Fill in remaining MTD driver data \r
mtd->type = MTD_NANDFLASH;//MTD_RAM;//\r
mtd->unpoint = NULL;\r
mtd->read = rk28xxnand_read;\r
mtd->write = rk28xxnand_write;\r
- mtd->read_oob = rk28xxnand_read_oob;\r
- mtd->write_oob = rk28xxnand_write_oob;\r
+ mtd->read_oob = NULL;\r
+ mtd->write_oob = NULL;\r
mtd->panic_write = NULL;\r
\r
mtd->sync = rk28xxnand_sync;\r
- mtd->lock = rk28xxnand_lock;\r
- mtd->unlock = rk28xxnand_unlock;\r
- mtd->suspend = rk28xxnand_suspend;\r
- mtd->resume = rk28xxnand_resume;\r
- mtd->block_isbad = rk28xxnand_block_isbad;\r
- mtd->block_markbad = rk28xxnand_block_markbad;\r
+ mtd->lock = NULL;\r
+ mtd->unlock = NULL;\r
+ mtd->suspend = NULL;\r
+ mtd->resume = NULL;\r
+ mtd->block_isbad = NULL;\r
+ mtd->block_markbad = NULL;\r
mtd->owner = THIS_MODULE;\r
\r
- page_mtd->size = FtlGetPageZoneCapacity();\r
+#ifdef PAGE_REMAP\r
+ page_mtd->size = FtlGetPageZoneCapacity()*0x200;\r
//readflash modify rk28_partition_info\r
- NAND_DEBUG(NAND_DEBUG_LEVEL0,"page_mtd->size: %x\n",page_mtd->size);\r
+ NAND_DEBUG(NAND_DEBUG_LEVEL0,"page_mtd->size: 0x%012llx\n",page_mtd->size);\r
page_mtd->oobsize = 0;\r
page_mtd->oobavail = 0;\r
page_mtd->ecclayout = 0;\r
- page_mtd->erasesize = FlashGetPageSize(); //sector\r
- page_mtd->writesize = FlashGetPageSize();\r
+ page_mtd->erasesize = FlashGetPageSize()*0x200; //sector\r
+ page_mtd->writesize = FlashGetPageSize()*0x200;\r
\r
// Fill in remaining MTD driver data \r
page_mtd->type = MTD_NANDFLASH;//MTD_RAM;//\r
page_mtd->unpoint = NULL;\r
page_mtd->read = rk28xxnand_page_read;\r
page_mtd->write = rk28xxnand_page_write;\r
- page_mtd->read_oob = rk28xxnand_read_oob;\r
- page_mtd->write_oob = rk28xxnand_write_oob;\r
+ page_mtd->read_oob = NULL;\r
+ page_mtd->write_oob = NULL;\r
page_mtd->panic_write = NULL;\r
\r
page_mtd->sync = rk28xxnand_sync;\r
- page_mtd->lock = rk28xxnand_lock;\r
- page_mtd->unlock = rk28xxnand_unlock;\r
- page_mtd->suspend = rk28xxnand_suspend;\r
- page_mtd->resume = rk28xxnand_resume;\r
- page_mtd->block_isbad = rk28xxnand_block_isbad;\r
- page_mtd->block_markbad = rk28xxnand_block_markbad;\r
+ page_mtd->lock = NULL;\r
+ page_mtd->unlock = NULL;\r
+ page_mtd->suspend = NULL;\r
+ page_mtd->resume = NULL;\r
+ page_mtd->block_isbad = NULL;\r
+ page_mtd->block_markbad = NULL;\r
page_mtd->owner = THIS_MODULE;\r
+#endif\r
\r
- return 0;\r
+ return 0;\r
}\r
\r
\r
\r
static int rk28xxnand_add_partitions(struct rknand_info *nand_info)\r
{\r
- NAND_DEBUG(NAND_DEBUG_LEVEL0,"Enter rk28xxnand_add_partitions\n");\r
#ifdef CONFIG_MTD_CMDLINE_PARTS\r
int num_partitions = 0; \r
\r
int i;\r
for (i = 0; i < num_partitions; i++) \r
{\r
- //printk(KERN_ERR"111 offset 0x%012llx size :0x%012llx\n",nand_info->parts[i].offset, nand_info->parts[i].size);\r
nand_info->parts[i].offset *= 0x200;\r
nand_info->parts[i].size *=0x200;\r
//printk(KERN_ERR"offset 0x%012llx size :0x%012llx\n",nand_info->parts[i].offset, nand_info->parts[i].size);\r
}\r
nand_info->parts[num_partitions - 1].size = nand_info->mtd.size - nand_info->parts[num_partitions - 1].offset;\r
\r
-#ifdef use_image\r
g_num_partitions = num_partitions;\r
-#endif\r
return add_mtd_partitions(&nand_info->mtd, nand_info->parts, num_partitions);\r
} \r
#endif \r
\r
// rk28_partition_info[1].size = nand_info->mtd.size - ((ROOTFS_PART_SIZE + PARA_PART_SIZE + KERNEL_PART_SIZE)*0x100000);\r
// rk28_partition_info[2].offset = rk28_partition_info[1].size + rk28_partition_info[1].offset;\r
-#ifdef use_image\r
g_num_partitions = sizeof(rk28_partition_info)/sizeof(struct mtd_partition);\r
-#endif\r
return add_mtd_partitions(&nand_info->mtd, rk28_partition_info, sizeof(rk28_partition_info)/sizeof(struct mtd_partition));//MAX_FLASH_PARTITION);\r
}\r
\r
-static int __devinit rk28xxnand_probe(struct platform_device *pdev)\r
+static int rknand_probe(struct platform_device *pdev)\r
{\r
struct rknand_info *nand_info;\r
struct mtd_partition *parts;\r
int i;\r
- struct resource *res = pdev->resource;\r
+ //struct resource *res = pdev->resource;\r
int err = 0;\r
NAND_DEBUG(NAND_DEBUG_LEVEL0,"rk28xxnand_probe: \n");\r
gpNandInfo = kzalloc(sizeof(struct rknand_info), GFP_KERNEL);\r
err = -ENXIO;\r
goto exit_free;\r
}\r
- \r
+#ifdef CONFIG_MTD_RKNAND_BUFFER\r
+ if(rknand_buffer_init())\r
+ {\r
+ err = -ENXIO;\r
+ goto exit_free;\r
+ }\r
+#endif \r
+ rk28nand_create_procfs();\r
/*{\r
char pbuf[512];\r
GetSNSectorInfo(pbuf);\r
} */ \r
\r
rk28xxnand_add_partitions(nand_info);\r
- return 0;\r
- \r
- #if 0\r
- nand_info->page_mtd.name = "pagecache";\r
- add_mtd_device(&nand_info->page_mtd);\r
- #else\r
- //rk28_page_part_info[1].size = nand_info->page_mtd.size - rk28_page_part_info[0].size;\r
- //add_mtd_partitions(&nand_info->page_mtd, rk28_page_part_info, 2);\r
- #endif\r
- \r
-#ifdef use_image\r
+\r
+#ifdef PAGE_REMAP\r
+ rk28_page_part_info[1].size = nand_info->page_mtd.size - rk28_page_part_info[0].size;\r
+ add_mtd_partitions(&nand_info->page_mtd, rk28_page_part_info, 2);\r
+#endif\r
+ \r
parts = nand_info->parts;\r
for(i=0;i<g_num_partitions;i++)\r
{\r
- printk(">>> part[%d]: name=%s offset=0x%X\n", i, parts[i].name, parts[i].offset);\r
+ printk(">>> part[%d]: name=%s offset=0x%012llx\n", i, parts[i].name, parts[i].offset);\r
if(strcmp(parts[i].name,"cache") == 0)\r
{\r
- SysImageWriteEndAdd = parts[i].offset;\r
- printk(">>> SysImageWriteEndAdd=0x%X\n", SysImageWriteEndAdd);\r
+ SysImageWriteEndAdd = (unsigned long)parts[i].offset>>9;//sector\r
+ printk(">>> SysImageWriteEndAdd=0x%lx\n", SysImageWriteEndAdd);\r
break;\r
}\r
}\r
-#endif\r
\r
FtlSetSysProtAddr(SysImageWriteEndAdd);\r
dev_set_drvdata(&pdev->dev, nand_info);\r
\r
return err;\r
}\r
-\r
-static int __devexit rknand_remove(struct device *dev)\r
+#if 0\r
+static int rknand_remove(struct device *dev)\r
{\r
struct platform_device *pdev = to_platform_device(dev);\r
struct rknand_info *nand_info = dev_get_drvdata(&pdev->dev);\r
}\r
return 0;\r
}\r
+#endif\r
+static int rknand_suspend(struct platform_device *pdev, pm_message_t state)\r
+{\r
+ gpNandInfo->rknand.rknand_schedule_enable = 0;\r
+ NAND_DEBUG(NAND_DEBUG_LEVEL0,"rknand_suspend: \n");\r
+ return 0;\r
+}\r
\r
-void rk28xxnand_shutdown(struct platform_device *pdev)\r
+static int rknand_resume(struct platform_device *pdev)\r
{\r
- NAND_DEBUG(NAND_DEBUG_LEVEL0,"rk28xxnand_shutdown\n");\r
- //rknand_get_device(FL_UNVALID);\r
- //FtlClose();\r
- //rknand_release_device();\r
+ gpNandInfo->rknand.rknand_schedule_enable = 1;\r
+ NAND_DEBUG(NAND_DEBUG_LEVEL0,"rknand_resume: \n");\r
+ return 0;\r
+}\r
+\r
+void rknand_shutdown(struct platform_device *pdev)\r
+{\r
+#ifdef CONFIG_MTD_RKNAND_BUFFER\r
+ NAND_DEBUG(NAND_DEBUG_LEVEL0,"rknand_shutdown...\n");\r
+ gpNandInfo->rknand.rknand_schedule_enable = 0;\r
+ rknand_buffer_shutdown(); \r
+#else\r
+ struct rknand_chip *nand_info = &gpNandInfo->rknand;\r
+ nand_info->rknand_schedule_enable = 0;\r
+ NAND_DEBUG(NAND_DEBUG_LEVEL0,"rknand_shutdown...\n");\r
+ if (nand_info->state == FL_READY)\r
+ {\r
+ nand_info->state = FL_UNVALID;\r
+ FtlClose();\r
+ rknand_release_device();\r
+ }\r
+ else\r
+ {\r
+ nand_info->pFlashCallBack = FtlClose;\r
+ }\r
+#endif\r
}\r
\r
static struct platform_driver rknand_driver = {\r
- .probe = rk28xxnand_probe,\r
- .remove = rknand_remove,\r
- .suspend = rk28xxnand_suspend,\r
- .resume = rk28xxnand_resume,\r
- .shutdown = rk28xxnand_shutdown,\r
+ .probe = rknand_probe,\r
+ //.remove = rknand_remove,\r
+ .suspend = rknand_suspend,\r
+ .resume = rknand_resume,\r
+ .shutdown = rknand_shutdown,\r
.driver = {\r
.name = DRIVER_NAME,\r
.owner = THIS_MODULE,\r
\r
static void __exit rknand_exit(void)\r
{\r
- NAND_DEBUG(NAND_DEBUG_LEVEL0,"rknand_exit: \n");\r
- rknand_get_device(FL_UNVALID);\r
- FtlClose();\r
- rknand_release_device();\r
+ //NAND_DEBUG(NAND_DEBUG_LEVEL0,"rknand_exit: \n");\r
+ //rknand_get_device(FL_UNVALID);\r
+ //FtlClose();\r
+ //rknand_release_device();\r
platform_driver_unregister(&rknand_driver);\r
}\r
\r
module_init(rknand_init);\r
module_exit(rknand_exit);\r
\r
-\r
#if 0//def CONFIG_rknand\r
/*\r
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static int rknand_sys_suspend(struct sys_device *dev, pm_message_t state)\r
{\r
struct rknand_chip *nand_info = &gpNandInfo->rknand;\r
- NAND_DEBUG(NAND_DEBUG_LEVEL0,"...rknand_sys_suspend...\n");\r
extern void FtlCacheWriteBack(void);\r
+ NAND_DEBUG(NAND_DEBUG_LEVEL0,"...rknand_sys_suspend...\n");\r
nand_info->rknand_schedule_enable = 0;\r
if (nand_info->state == FL_READY)\r
{\r
typedef int BOOLEAN;\r
typedef BOOLEAN BOOL;\r
\r
+\r
#define FALSE 0\r
#define TRUE (!FALSE)\r
-#define NULL 0\r
-#define OK 0\r
-#define ERROR !0\r
+#ifndef NULL\r
+ #define NULL 0\r
+#endif\r
+#define OK 0\r
+#define ERROR !0\r
\r
//typedef char * va_list; \r
\r
\r
-typedef unsigned int uint32;\r
-typedef unsigned int UINT32;\r
+typedef unsigned long uint32;\r
+typedef unsigned long UINT32;\r
typedef unsigned short UINT16;\r
typedef unsigned char UINT8;\r
typedef int INT32;\r
projects / firefly-linux-kernel-4.4.55.git / commitdiff