ARM: imx: let L2 initialization be a common function
authorShawn Guo <shawn.guo@linaro.org>
Mon, 8 Jul 2013 13:45:20 +0000 (21:45 +0800)
committerShawn Guo <shawn.guo@linaro.org>
Fri, 16 Aug 2013 05:11:22 +0000 (13:11 +0800)
Move imx6q L2 initialization function imx6q_init_l2cache() into
system.c, and rename it imx_init_l2cache(), so that other platforms
other than imx6q can also use the function.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
arch/arm/mach-imx/common.h
arch/arm/mach-imx/mach-imx6q.c
arch/arm/mach-imx/system.c

index cb6c838b63edad7841ade9fcad0eb5ec82ebc51a..b96aff7476ea2a6f337843c5f46063c249cc64c7 100644 (file)
@@ -161,6 +161,12 @@ extern int mx51_neon_fixup(void);
 static inline int mx51_neon_fixup(void) { return 0; }
 #endif
 
+#ifdef CONFIG_CACHE_L2X0
+extern void imx_init_l2cache(void);
+#else
+static inline void imx_init_l2cache(void) {}
+#endif
+
 extern struct smp_operations imx_smp_ops;
 
 #endif
index 59218418fde38c98d7ee62568babb7463c42ca17..9f06cc8789c6b4aca93052f200c1068598783732 100644 (file)
@@ -32,7 +32,6 @@
 #include <linux/micrel_phy.h>
 #include <linux/mfd/syscon.h>
 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
-#include <asm/hardware/cache-l2x0.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/system_misc.h>
@@ -352,44 +351,10 @@ static void __init imx6q_map_io(void)
        imx_scu_map_io();
 }
 
-#ifdef CONFIG_CACHE_L2X0
-static void __init imx6q_init_l2cache(void)
-{
-       void __iomem *l2x0_base;
-       struct device_node *np;
-       unsigned int val;
-
-       np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
-       if (!np)
-               goto out;
-
-       l2x0_base = of_iomap(np, 0);
-       if (!l2x0_base) {
-               of_node_put(np);
-               goto out;
-       }
-
-       /* Configure the L2 PREFETCH and POWER registers */
-       val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL);
-       val |= 0x70800000;
-       writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL);
-       val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN;
-       writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL);
-
-       iounmap(l2x0_base);
-       of_node_put(np);
-
-out:
-       l2x0_of_init(0, ~0UL);
-}
-#else
-static inline void imx6q_init_l2cache(void) {}
-#endif
-
 static void __init imx6q_init_irq(void)
 {
        imx6q_init_revision();
-       imx6q_init_l2cache();
+       imx_init_l2cache();
        imx_src_init();
        imx_gpc_init();
        irqchip_init();
index 6fe81bb4d3c9641cd50d48e2944b8bfad71a0fe2..e5592cab1f6a8256a79deee9144ed67d078c36f4 100644 (file)
@@ -27,6 +27,7 @@
 #include <asm/system_misc.h>
 #include <asm/proc-fns.h>
 #include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
 
 #include "common.h"
 #include "hardware.h"
@@ -95,3 +96,35 @@ void __init mxc_arch_reset_init_dt(void)
 
        clk_prepare(wdog_clk);
 }
+
+#ifdef CONFIG_CACHE_L2X0
+static void __init imx_init_l2cache(void)
+{
+       void __iomem *l2x0_base;
+       struct device_node *np;
+       unsigned int val;
+
+       np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
+       if (!np)
+               goto out;
+
+       l2x0_base = of_iomap(np, 0);
+       if (!l2x0_base) {
+               of_node_put(np);
+               goto out;
+       }
+
+       /* Configure the L2 PREFETCH and POWER registers */
+       val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL);
+       val |= 0x70800000;
+       writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL);
+       val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN;
+       writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL);
+
+       iounmap(l2x0_base);
+       of_node_put(np);
+
+out:
+       l2x0_of_init(0, ~0UL);
+}
+#endif