drm/radeon/kms: add bo blit support for Ontario fusion APUs
authorAlex Deucher <alexdeucher@gmail.com>
Mon, 22 Nov 2010 22:56:33 +0000 (17:56 -0500)
committerDave Airlie <airlied@redhat.com>
Mon, 22 Nov 2010 23:23:30 +0000 (09:23 +1000)
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/evergreen_blit_kms.c
drivers/gpu/drm/radeon/radeon_asic.c

index e0e590110dd47ffb06b2161ed1058e731620c826..2ccd1f0545fe289fb14861250a07e9109fbcbb84 100644 (file)
@@ -147,7 +147,8 @@ set_vtx_resource(struct radeon_device *rdev, u64 gpu_addr)
        radeon_ring_write(rdev, 0);
        radeon_ring_write(rdev, SQ_TEX_VTX_VALID_BUFFER << 30);
 
-       if (rdev->family == CHIP_CEDAR)
+       if ((rdev->family == CHIP_CEDAR) ||
+           (rdev->family == CHIP_PALM))
                cp_set_surface_sync(rdev,
                                    PACKET3_TC_ACTION_ENA, 48, gpu_addr);
        else
@@ -331,9 +332,31 @@ set_default_state(struct radeon_device *rdev)
                num_hs_stack_entries = 85;
                num_ls_stack_entries = 85;
                break;
+       case CHIP_PALM:
+               num_ps_gprs = 93;
+               num_vs_gprs = 46;
+               num_temp_gprs = 4;
+               num_gs_gprs = 31;
+               num_es_gprs = 31;
+               num_hs_gprs = 23;
+               num_ls_gprs = 23;
+               num_ps_threads = 96;
+               num_vs_threads = 16;
+               num_gs_threads = 16;
+               num_es_threads = 16;
+               num_hs_threads = 16;
+               num_ls_threads = 16;
+               num_ps_stack_entries = 42;
+               num_vs_stack_entries = 42;
+               num_gs_stack_entries = 42;
+               num_es_stack_entries = 42;
+               num_hs_stack_entries = 42;
+               num_ls_stack_entries = 42;
+               break;
        }
 
-       if (rdev->family == CHIP_CEDAR)
+       if ((rdev->family == CHIP_CEDAR) ||
+           (rdev->family == CHIP_PALM))
                sq_config = 0;
        else
                sq_config = VC_ENABLE;
index 4e487cc16e7fb5a9290aaabc5953c510f61ba4db..de7bfbcd09c965ca7c2c19c3c1c7d9e4a366facc 100644 (file)
@@ -769,9 +769,9 @@ static struct radeon_asic sumo_asic = {
        .get_vblank_counter = &evergreen_get_vblank_counter,
        .fence_ring_emit = &r600_fence_ring_emit,
        .cs_parse = &evergreen_cs_parse,
-       .copy_blit = NULL,
-       .copy_dma = NULL,
-       .copy = NULL,
+       .copy_blit = &evergreen_copy_blit,
+       .copy_dma = &evergreen_copy_blit,
+       .copy = &evergreen_copy_blit,
        .get_engine_clock = &radeon_atom_get_engine_clock,
        .set_engine_clock = &radeon_atom_set_engine_clock,
        .get_memory_clock = NULL,