implement the vsldoi intrinsic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27139 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPCInstrAltivec.td b/lib/Target/PowerPC/PPCInstrAltivec.td
index f31dfab1873e2a7722b75bda9f6d4e2ead7613ce..58e460469084c75309a352b2a79f3740a3c9c249 100644 (file)
--- a/lib/Target/PowerPC/PPCInstrAltivec.td
+++ b/lib/Target/PowerPC/PPCInstrAltivec.td
@@ -71,13 +71,13 @@ let isLoad = 1, PPC970_Unit = 2 in {  // Loads.
 def LVEBX: XForm_1<31,   7, (ops VRRC:$vD, memrr:$src),
                    "lvebx $vD, $src", LdStGeneral,
                    [(set VRRC:$vD, (v16i8 (PPClve_x xoaddr:$src)))]>;
-def LVEHX: XForm_1<31,  39, (ops VRRC:$vD,  memrr:$src),
+def LVEHX: XForm_1<31,  39, (ops VRRC:$vD, memrr:$src),
                    "lvehx $vD, $src", LdStGeneral,
                    [(set VRRC:$vD, (v8i16 (PPClve_x xoaddr:$src)))]>;
-def LVEWX: XForm_1<31,  71, (ops VRRC:$vD,  memrr:$src),
+def LVEWX: XForm_1<31,  71, (ops VRRC:$vD, memrr:$src),
                    "lvewx $vD, $src", LdStGeneral,
                    [(set VRRC:$vD, (v4f32 (PPClve_x xoaddr:$src)))]>;
-def LVX  : XForm_1<31, 103, (ops VRRC:$vD,  memrr:$src),
+def LVX  : XForm_1<31, 103, (ops VRRC:$vD, memrr:$src),
                    "lvx $vD, $src", LdStGeneral,
                    [(set VRRC:$vD, (v4f32 (load xoaddr:$src)))]>;
 }
@@ -121,7 +121,11 @@ def VPERM   : VAForm_1<43, (ops VRRC:$vD, VRRC:$vA, VRRC:$vC, VRRC:$vB),
                        "vperm $vD, $vA, $vB, $vC", VecPerm,
                        [(set VRRC:$vD,
                              (PPCvperm (v4f32 VRRC:$vA), VRRC:$vB, VRRC:$vC))]>;
-
+def VSLDOI  : VAForm_2<44, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, u5imm:$SH),
+                       "vsldoi $vD, $vA, $vB, $SH", VecFP,
+                       [(set VRRC:$vD,
+                             (int_ppc_altivec_vsldoi VRRC:$vA, VRRC:$vB,
+                                                     imm:$SH))]>;
 
 // VX-Form instructions.  AltiVec arithmetic ops.
 def VADDCUW : VXForm_1<384, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),

diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td
index 868771a167689c94b8dc5849f47467f399f89a3a..e576e61931d636d8fd1c6c890a333d8097d12218 100644 (file)
--- a/lib/Target/PowerPC/PPCInstrFormats.td
+++ b/lib/Target/PowerPC/PPCInstrFormats.td
@@ -607,6 +607,24 @@ class VAForm_1<bits<6> xo, dag OL, string asmstr,
   let Inst{26-31} = xo;
 }
 
+class VAForm_2<bits<6> xo, dag OL, string asmstr,
+               InstrItinClass itin, list<dag> pattern>
+    : I<4, OL, asmstr, itin> {
+  bits<5> VD;
+  bits<5> VA;
+  bits<5> VB;
+  bits<4> SH;
+
+  let Pattern = pattern;
+  
+  let Inst{6-10}  = VD;
+  let Inst{11-15} = VA;
+  let Inst{16-20} = VB;
+  let Inst{21}    = 0;
+  let Inst{22-25} = SH;
+  let Inst{26-31} = xo;
+}
+
 // E-2 VX-Form
 class VXForm_1<bits<11> xo, dag OL, string asmstr,
                InstrItinClass itin, list<dag> pattern>