+++ /dev/null
-#include <linux/module.h>\r
-#include <linux/moduleparam.h>\r
-#include <linux/version.h>\r
-#include <linux/kernel.h>\r
-#include <linux/init.h>\r
-#include <linux/delay.h>\r
-#include <linux/pm.h>\r
-#include <linux/i2c.h>\r
-#include <linux/platform_device.h>\r
-\r
-#include <sound/core.h>\r
-#include <sound/pcm.h>\r
-#include <sound/pcm_params.h>\r
-#include <sound/soc.h>\r
-#include <sound/soc-dapm.h>\r
-#include <sound/initval.h>\r
-#include <asm/div64.h>\r
-#include "alc5621.h"\r
-\r
-#if REALTEK_HWDEP\r
-\r
-#include <linux/ioctl.h>\r
-#include <linux/types.h>\r
-\r
-#endif\r
-\r
-#define AUDIO_NAME "rt5621"\r
-#define RT5621_VERSION "alsa 1.0.21 0.05"\r
-\r
-#ifdef RT5621_DEBUG\r
-#define dbg(format, arg...) \\r
- printk(KERN_DEBUG AUDIO_NAME ": " format "\n" , ## arg)\r
-#else\r
-#define dbg(format, arg...) do {} while (0)\r
-#endif\r
-#define err(format, arg...) \\r
- printk(KERN_ERR AUDIO_NAME ": " format "\n" , ## arg)\r
-#define info(format, arg...) \\r
- printk(KERN_INFO AUDIO_NAME ": " format "\n" , ## arg)\r
-#define warn(format, arg...) \\r
- printk(KERN_WARNING AUDIO_NAME ": " format "\n" , ## arg)\r
- \r
-static int caps_charge = 500;\r
-module_param(caps_charge, int, 0);\r
-MODULE_PARM_DESC(caps_charge, "RT5621 cap charge time (msecs)");\r
-\r
-/* codec private data */\r
-struct rt5621_priv {\r
- unsigned int sysclk;\r
-};\r
-\r
-static struct snd_soc_device *rt5621_socdev;\r
-\r
-struct rt5621_reg{\r
-\r
- u8 reg_index;\r
- u16 reg_value;\r
-};\r
-\r
-static struct rt5621_reg init_data[] = {\r
- {RT5621_AUDIO_INTERFACE, 0x8000}, //set I2S codec to slave mode\r
- {RT5621_STEREO_DAC_VOL, 0x0808}, //default stereo DAC volume to 0db\r
- {RT5621_OUTPUT_MIXER_CTRL, 0x0740}, //default output mixer control \r
- {RT5621_ADC_REC_MIXER, 0x3f3f}, //set record source is Mic1 by default\r
- {RT5621_MIC_CTRL, 0x0500}, //set Mic1,Mic2 boost 20db \r
- {RT5621_SPK_OUT_VOL, 0x8080}, //default speaker volume to 0db \r
- {RT5621_HP_OUT_VOL, 0x8888}, //default HP volume to -12db \r
- {RT5621_ADD_CTRL_REG, 0x5f00}, //Class AB/D speaker ratio is 1VDD\r
- {RT5621_STEREO_AD_DA_CLK_CTRL, 0x066d}, //set Dac filter to 256fs\r
- {RT5621_HID_CTRL_INDEX, 0x46}, //Class D setting\r
- {RT5621_HID_CTRL_DATA, 0xFFFF}, //power on Class D Internal register\r
-};\r
-\r
-#define RT5621_INIT_REG_NUM ARRAY_SIZE(init_data)\r
-\r
-/*\r
- * rt5621 register cache\r
- * We can't read the RT5621 register space when we\r
- * are using 2 wire for device control, so we cache them instead.\r
- */\r
-static const u16 rt5621_reg[0x80/2];\r
-\r
-\r
-/* virtual HP mixers regs */\r
-#define HPL_MIXER 0x80\r
-#define HPR_MIXER 0x82\r
-/*reg84*/\r
-/*bit0,1:for hp pga power control\r
- *bit2,3:for aux pga power control\r
- */\r
-#define MISC_FUNC_REG 0x84\r
-static u16 reg80=0,reg82=0, reg84 = 0;\r
-\r
-\r
-/*\r
- * read rt5621 register cache\r
- */\r
-static inline unsigned int rt5621_read_reg_cache(struct snd_soc_codec *codec,\r
- unsigned int reg)\r
-{\r
- u16 *cache = codec->reg_cache;\r
- if (reg < 1 || reg > (ARRAY_SIZE(rt5621_reg) + 1))\r
- return -1;\r
- return cache[reg/2];\r
-}\r
-\r
-\r
-/*\r
- * write rt5621 register cache\r
- */\r
-\r
-static inline void rt5621_write_reg_cache(struct snd_soc_codec *codec,\r
- unsigned int reg, unsigned int value)\r
-{\r
- u16 *cache = codec->reg_cache;\r
- if (reg < 0 || reg > 0x7e)\r
- return;\r
- cache[reg/2] = value;\r
-}\r
-\r
-\r
-\r
-static int rt5621_write(struct snd_soc_codec *codec, unsigned int reg,\r
- unsigned int value)\r
-{\r
- u8 data[3];\r
-\r
- if(reg>0x7E)\r
- {\r
- if(reg==HPL_MIXER)\r
- reg80=value;\r
- else if(reg==HPR_MIXER)\r
- reg82=value;\r
- else if (reg == MISC_FUNC_REG)\r
- reg84 = value;\r
- else\r
- return -EIO;\r
- \r
- return 0; \r
- } \r
-\r
-\r
- printk("rt5621 write reg=%x,value=%x\n",reg,value);\r
- data[0] = reg;\r
- data[1] = (0xFF00 & value) >> 8;\r
- data[2] = 0x00FF & value;\r
-\r
- if (codec->hw_write(codec->control_data, data, 3) == 3)\r
- {\r
- rt5621_write_reg_cache (codec, reg, value); \r
- printk(KERN_INFO "rt5621 write reg=%x,value=%x\n",reg,value);\r
- return 0;\r
- }\r
- else\r
- {\r
- printk(KERN_ERR "rt5621 write faile\n");\r
- return -EIO;\r
- }\r
-}\r
-\r
-\r
-static unsigned int rt5621_read(struct snd_soc_codec *codec, unsigned int reg)\r
-{\r
- u8 data[2]={0};\r
- unsigned int value=0x0;\r
-\r
- if(reg>0x7E)\r
- {\r
- if(reg==HPL_MIXER)\r
- return reg80;\r
- else if(reg==HPR_MIXER)\r
- return reg82;\r
- else if (reg == MISC_FUNC_REG)\r
- return reg84;\r
- else\r
- return -EIO;\r
- \r
- return -EIO; \r
- }\r
-\r
-\r
- data[0] = reg;\r
-//flove031811_S\r
-#if 0\r
- i2c_master_recv(codec->control_data, data, 2);\r
- \r
- value = (data[0]<<8) | data[1]; \r
- printk("rt5621_read reg%x=%x\n",reg,value);\r
-#elif 1\r
-\r
- i2c_master_reg8_recv(codec->control_data,reg,data, 2,100 * 1000);\r
-\r
- value = (data[0]<<8) | data[1]; \r
- printk("rt5621_read reg%x=%x\n",reg,value);\r
- return value;\r
-\r
-#else \r
- if(codec->hw_write(codec->control_data, data, 1) ==1)\r
- {\r
- i2c_master_recv(codec->control_data, data, 2);\r
-\r
- value = (data[0]<<8) | data[1]; \r
- printk(KERN_DEBUG "rt5621 read reg%x=%x\n",reg,value);\r
- \r
- return value;\r
- }\r
- else\r
- {\r
- printk(KERN_ERR "rt5621 read faile\n");\r
- return -EIO; \r
- } \r
-#endif\r
-//flove031811_E \r
-}\r
-\r
-#define rt5621_write_mask(c, reg, value, mask) snd_soc_update_bits(c, reg, mask, value)\r
-\r
-\r
-#define rt5621_reset(c) rt5621_write(c, 0x0, 0)\r
-\r
-static unsigned int rt5621_read_index(struct snd_soc_codec *codec, unsigned int index)\r
-{\r
- unsigned int value;\r
-\r
- rt5621_write(codec, 0x6a, index);\r
- mdelay(1);\r
- value = rt5621_read(codec, 0x6c);\r
- return value;\r
-}\r
-\r
-static int rt5621_init_reg(struct snd_soc_codec *codec)\r
-{\r
- int i;\r
-\r
- for (i = 0; i < RT5621_INIT_REG_NUM; i++)\r
- {\r
- rt5621_write(codec, init_data[i].reg_index, init_data[i].reg_value);\r
- }\r
-\r
- return 0;\r
-}\r
-\r
-\r
-#if !USE_DAPM_CONTROL\r
-//*****************************************************************************\r
-//\r
-//function:Change audio codec power status\r
-//\r
-//*****************************************************************************\r
-static int rt5621_ChangeCodecPowerStatus(struct snd_soc_codec *codec,int power_state)\r
-{\r
- unsigned short int PowerDownState=0;\r
-\r
- switch(power_state)\r
- {\r
- case POWER_STATE_D0: //FULL ON-----power on all power\r
- \r
- rt5621_write(codec,RT5621_PWR_MANAG_ADD1,~PowerDownState);\r
- rt5621_write(codec,RT5621_PWR_MANAG_ADD2,~PowerDownState);\r
- rt5621_write(codec,RT5621_PWR_MANAG_ADD3,~PowerDownState);\r
-\r
- break; \r
-\r
- case POWER_STATE_D1: //LOW ON-----\r
-\r
-\r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD2 ,PWR_VREF |PWR_DAC_REF_CIR |PWR_L_DAC_CLK |PWR_R_DAC_CLK |PWR_L_HP_MIXER |PWR_R_HP_MIXER|\r
- PWR_L_ADC_CLK_GAIN |PWR_R_ADC_CLK_GAIN |PWR_L_ADC_REC_MIXER |PWR_R_ADC_REC_MIXER|PWR_CLASS_AB\r
- ,PWR_VREF |PWR_DAC_REF_CIR |PWR_L_DAC_CLK |PWR_R_DAC_CLK |PWR_L_HP_MIXER |PWR_R_HP_MIXER|\r
- PWR_L_ADC_CLK_GAIN |PWR_R_ADC_CLK_GAIN |PWR_L_ADC_REC_MIXER |PWR_R_ADC_REC_MIXER|PWR_CLASS_AB);\r
-\r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD3 ,PWR_MAIN_BIAS|PWR_HP_R_OUT_VOL|PWR_HP_L_OUT_VOL|PWR_SPK_OUT|\r
- PWR_MIC1_FUN_CTRL|PWR_MIC1_BOOST_MIXER\r
- ,PWR_MAIN_BIAS|PWR_HP_R_OUT_VOL|PWR_HP_L_OUT_VOL|PWR_SPK_OUT|\r
- PWR_MIC1_FUN_CTRL|PWR_MIC1_BOOST_MIXER); \r
-\r
-\r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD1 ,PWR_MAIN_I2S_EN|PWR_HP_OUT_ENH_AMP|PWR_HP_OUT_AMP|PWR_MIC1_BIAS_EN\r
- ,PWR_MAIN_I2S_EN|PWR_HP_OUT_ENH_AMP|PWR_HP_OUT_AMP|PWR_MIC1_BIAS_EN);\r
- \r
- break;\r
-\r
- case POWER_STATE_D1_PLAYBACK: //Low on of Playback\r
-\r
-\r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD2,PWR_VREF|PWR_DAC_REF_CIR|PWR_L_DAC_CLK|PWR_R_DAC_CLK|PWR_L_HP_MIXER|PWR_R_HP_MIXER|PWR_CLASS_AB|PWR_CLASS_D\r
- ,PWR_VREF|PWR_DAC_REF_CIR|PWR_L_DAC_CLK|PWR_R_DAC_CLK|PWR_L_HP_MIXER|PWR_R_HP_MIXER|PWR_CLASS_AB|PWR_CLASS_D);\r
-\r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD3,PWR_MAIN_BIAS|PWR_HP_R_OUT_VOL|PWR_HP_L_OUT_VOL|PWR_SPK_OUT \r
- ,PWR_MAIN_BIAS|PWR_HP_R_OUT_VOL|PWR_HP_L_OUT_VOL|PWR_SPK_OUT); \r
-\r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD1,PWR_MAIN_I2S_EN|PWR_HP_OUT_ENH_AMP|PWR_HP_OUT_AMP\r
- ,PWR_MAIN_I2S_EN|PWR_HP_OUT_ENH_AMP|PWR_HP_OUT_AMP);\r
- \r
-\r
- break;\r
-\r
- case POWER_STATE_D1_RECORD: //Low on of Record\r
-\r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD1 ,PWR_MAIN_I2S_EN|PWR_MIC1_BIAS_EN\r
- ,PWR_MAIN_I2S_EN|PWR_MIC1_BIAS_EN); \r
- \r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD2 ,PWR_VREF|PWR_L_ADC_CLK_GAIN|PWR_R_ADC_CLK_GAIN|PWR_L_ADC_REC_MIXER|PWR_R_ADC_REC_MIXER\r
- ,PWR_VREF|PWR_L_ADC_CLK_GAIN|PWR_R_ADC_CLK_GAIN|PWR_L_ADC_REC_MIXER|PWR_R_ADC_REC_MIXER);\r
-\r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD3 ,PWR_MAIN_BIAS|PWR_MIC2_BOOST_MIXER|PWR_MIC1_BOOST_MIXER\r
- ,PWR_MAIN_BIAS|PWR_MIC2_BOOST_MIXER|PWR_MIC1_BOOST_MIXER); \r
- \r
- break;\r
-\r
- case POWER_STATE_D2: //STANDBY----\r
-\r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD1 ,0,PWR_MAIN_I2S_EN|PWR_HP_OUT_ENH_AMP|PWR_HP_OUT_AMP|PWR_MIC1_BIAS_EN); \r
-\r
-\r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD3 ,0,PWR_HP_R_OUT_VOL|PWR_HP_L_OUT_VOL|PWR_SPK_OUT|PWR_MIC1_FUN_CTRL|PWR_MIC1_BOOST_MIXER);\r
-\r
- \r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD2 ,0,PWR_DAC_REF_CIR |PWR_L_DAC_CLK |PWR_R_DAC_CLK |PWR_L_HP_MIXER |PWR_R_HP_MIXER|\r
- PWR_L_ADC_CLK_GAIN |PWR_R_ADC_CLK_GAIN |PWR_L_ADC_REC_MIXER |PWR_R_ADC_REC_MIXER|PWR_CLASS_AB|PWR_CLASS_D);\r
-\r
- \r
- break;\r
-\r
- case POWER_STATE_D2_PLAYBACK: //STANDBY of playback\r
-\r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD3 ,0,/*PWR_HP_R_OUT_VOL|PWR_HP_L_OUT_VOL|*/PWR_SPK_OUT);\r
-\r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD1 ,0,PWR_HP_OUT_ENH_AMP|PWR_HP_OUT_AMP); \r
- \r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD2 ,0,PWR_DAC_REF_CIR|PWR_L_DAC_CLK|PWR_R_DAC_CLK|PWR_L_HP_MIXER|PWR_R_HP_MIXER|PWR_CLASS_AB|PWR_CLASS_D);\r
-\r
- break;\r
-\r
- case POWER_STATE_D2_RECORD: //STANDBY of record\r
-\r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD1 ,0,PWR_MIC1_BIAS_EN); \r
- \r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD2 ,0,PWR_L_ADC_CLK_GAIN|PWR_R_ADC_CLK_GAIN|PWR_L_ADC_REC_MIXER|PWR_R_ADC_REC_MIXER);\r
-\r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD3 ,0,PWR_MIC2_BOOST_MIXER|PWR_MIC1_BOOST_MIXER); \r
-\r
- break; \r
-\r
- case POWER_STATE_D3: //SLEEP\r
- case POWER_STATE_D4: //OFF----power off all power\r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD1 ,0,PWR_HP_OUT_ENH_AMP|PWR_HP_OUT_AMP); \r
- rt5621_write(codec,RT5621_PWR_MANAG_ADD3,0);\r
- rt5621_write(codec,RT5621_PWR_MANAG_ADD1,0);\r
- rt5621_write(codec,RT5621_PWR_MANAG_ADD2,0);\r
- \r
- break; \r
-\r
- default:\r
-\r
- break;\r
- }\r
-\r
- return 0;\r
-}\r
-\r
-\r
-//*****************************************************************************\r
-//\r
-//function AudioOutEnable:Mute/Unmute audio out channel\r
-// WavOutPath:output channel\r
-// Mute :Mute/Unmute output channel \r
-//\r
-//*****************************************************************************\r
-static int rt5621_AudioOutEnable(struct snd_soc_codec *codec,unsigned short int WavOutPath,int Mute)\r
-{\r
- int RetVal=0; \r
-\r
- if(Mute)\r
- {\r
- switch(WavOutPath)\r
- {\r
- case RT_WAVOUT_ALL_ON:\r
-\r
- RetVal=rt5621_write_mask(codec,RT5621_SPK_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE); //Mute Speaker right/left channel\r
- RetVal=rt5621_write_mask(codec,RT5621_HP_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE); //Mute headphone right/left channel\r
- RetVal=rt5621_write_mask(codec,RT5621_MONO_AUX_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE); //Mute Aux/Mono right/left channel\r
- RetVal=rt5621_write_mask(codec,RT5621_STEREO_DAC_VOL,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER\r
- ,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER); //Mute DAC to HP,Speaker,Mono Mixer\r
- \r
- break;\r
- \r
- case RT_WAVOUT_HP:\r
-\r
- RetVal=rt5621_write_mask(codec,RT5621_HP_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE); //Mute headphone right/left channel\r
- \r
- break;\r
-\r
- case RT_WAVOUT_SPK:\r
- \r
- RetVal=rt5621_write_mask(codec,RT5621_SPK_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE); //Mute Speaker right/left channel \r
-\r
- break;\r
- \r
- case RT_WAVOUT_AUXOUT:\r
-\r
- RetVal=rt5621_write_mask(codec,RT5621_MONO_AUX_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE); //Mute AuxOut right/left channel\r
-\r
- break;\r
-\r
- case RT_WAVOUT_MONO:\r
-\r
- RetVal=rt5621_write_mask(codec,RT5621_MONO_AUX_OUT_VOL,RT_L_MUTE,RT_L_MUTE); //Mute MonoOut channel \r
-\r
- break;\r
-\r
- case RT_WAVOUT_DAC:\r
-\r
- RetVal=rt5621_write_mask(codec,RT5621_STEREO_DAC_VOL,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER\r
- ,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER); //Mute DAC to HP,Speaker,Mono Mixer \r
- break;\r
-\r
- default:\r
-\r
- return 0;\r
-\r
- }\r
- }\r
- else\r
- {\r
- switch(WavOutPath)\r
- {\r
-\r
- case RT_WAVOUT_ALL_ON:\r
-\r
- RetVal=rt5621_write_mask(codec,RT5621_SPK_OUT_VOL ,0,RT_L_MUTE|RT_R_MUTE); //Mute Speaker right/left channel\r
- RetVal=rt5621_write_mask(codec,RT5621_HP_OUT_VOL ,0,RT_L_MUTE|RT_R_MUTE); //Mute headphone right/left channel\r
- RetVal=rt5621_write_mask(codec,RT5621_MONO_AUX_OUT_VOL ,0,RT_L_MUTE|RT_R_MUTE); //Mute Aux/Mono right/left channel\r
- RetVal=rt5621_write_mask(codec,RT5621_STEREO_DAC_VOL ,0,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER); //Mute DAC to HP,Speaker,Mono Mixer\r
- \r
- break;\r
- \r
- case RT_WAVOUT_HP:\r
-\r
- RetVal=rt5621_write_mask(codec,RT5621_HP_OUT_VOL,0,RT_L_MUTE|RT_R_MUTE); //UnMute headphone right/left channel \r
- \r
- break;\r
-\r
- case RT_WAVOUT_SPK:\r
- \r
- RetVal=rt5621_write_mask(codec,RT5621_SPK_OUT_VOL,0,RT_L_MUTE|RT_R_MUTE); //unMute Speaker right/left channel \r
-\r
- break;\r
- \r
- case RT_WAVOUT_AUXOUT:\r
-\r
- RetVal=rt5621_write_mask(codec,RT5621_MONO_AUX_OUT_VOL,0,RT_L_MUTE|RT_R_MUTE);//unMute AuxOut right/left channel\r
-\r
- break;\r
-\r
- case RT_WAVOUT_MONO:\r
-\r
- RetVal=rt5621_write_mask(codec,RT5621_MONO_AUX_OUT_VOL,0,RT_L_MUTE); //unMute MonoOut channel \r
-\r
- break;\r
-\r
- case RT_WAVOUT_DAC:\r
-\r
- RetVal=rt5621_write_mask(codec,RT5621_STEREO_DAC_VOL,0,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER); //unMute DAC to HP,Speaker,Mono Mixer\r
-\r
- default:\r
- return 0;\r
- }\r
-\r
- }\r
- \r
- return RetVal;\r
-}\r
-\r
-\r
-//*****************************************************************************\r
-//\r
-//function:Enable/Disable ADC input source control\r
-//\r
-//*****************************************************************************\r
-static int Enable_ADC_Input_Source(struct snd_soc_codec *codec,unsigned short int ADC_Input_Sour,int Enable)\r
-{\r
- int bRetVal=0;\r
- \r
- if(Enable)\r
- {\r
- //Enable ADC source \r
- bRetVal=rt5621_write_mask(codec,RT5621_ADC_REC_MIXER,0,ADC_Input_Sour);\r
- }\r
- else\r
- {\r
- //Disable ADC source \r
- bRetVal=rt5621_write_mask(codec,RT5621_ADC_REC_MIXER,ADC_Input_Sour,ADC_Input_Sour);\r
- }\r
-\r
- return bRetVal;\r
-}\r
-#endif\r
-\r
-\r
-//static const char *rt5621_spkl_pga[] = {"Vmid","HPL mixer","SPK mixer","Mono Mixer"};\r
-static const char *rt5621_spkn_source_sel[] = {"RN", "RP", "LN"};\r
-static const char *rt5621_spk_pga[] = {"Vmid","HP mixer","SPK mixer","Mono Mixer"};\r
-static const char *rt5621_hpl_pga[] = {"Vmid","HPL mixer"};\r
-static const char *rt5621_hpr_pga[] = {"Vmid","HPR mixer"};\r
-static const char *rt5621_mono_pga[] = {"Vmid","HP mixer","SPK mixer","Mono Mixer"};\r
-static const char *rt5621_amp_type_sel[] = {"Class AB","Class D"};\r
-static const char *rt5621_mic_boost_sel[] = {"Bypass","20db","30db","40db"};\r
-\r
-static const struct soc_enum rt5621_enum[] = {\r
-SOC_ENUM_SINGLE(RT5621_OUTPUT_MIXER_CTRL, 14, 3, rt5621_spkn_source_sel), /* spkn source from hp mixer */ \r
-SOC_ENUM_SINGLE(RT5621_OUTPUT_MIXER_CTRL, 10, 4, rt5621_spk_pga), /* spk input sel 1 */ \r
-SOC_ENUM_SINGLE(RT5621_OUTPUT_MIXER_CTRL, 9, 2, rt5621_hpl_pga), /* hp left input sel 2 */ \r
-SOC_ENUM_SINGLE(RT5621_OUTPUT_MIXER_CTRL, 8, 2, rt5621_hpr_pga), /* hp right input sel 3 */ \r
-SOC_ENUM_SINGLE(RT5621_OUTPUT_MIXER_CTRL, 6, 4, rt5621_mono_pga), /* mono input sel 4 */\r
-SOC_ENUM_SINGLE(RT5621_MIC_CTRL , 10,4, rt5621_mic_boost_sel), /*Mic1 boost sel 5 */\r
-SOC_ENUM_SINGLE(RT5621_MIC_CTRL , 8,4,rt5621_mic_boost_sel), /*Mic2 boost sel 6 */\r
-SOC_ENUM_SINGLE(RT5621_OUTPUT_MIXER_CTRL,13,2,rt5621_amp_type_sel), /*Speaker AMP sel 7 */\r
-};\r
-\r
-static int rt5621_amp_sel_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)\r
-{\r
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);\r
- struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;\r
- unsigned short val;\r
- unsigned short mask, bitmask;\r
-\r
- for (bitmask = 1; bitmask < e->max; bitmask <<= 1)\r
- ;\r
- if (ucontrol->value.enumerated.item[0] > e->max - 1)\r
- return -EINVAL;\r
- val = ucontrol->value.enumerated.item[0] << e->shift_l;\r
- mask = (bitmask - 1) << e->shift_l;\r
- if (e->shift_l != e->shift_r) {\r
- if (ucontrol->value.enumerated.item[1] > e->max - 1)\r
- return -EINVAL;\r
- val |= ucontrol->value.enumerated.item[1] << e->shift_r;\r
- mask |= (bitmask - 1) << e->shift_r;\r
- }\r
-\r
- snd_soc_update_bits(codec, e->reg, mask, val);\r
- val &= (0x1 << 13);\r
- if (val == 0)\r
- {\r
- snd_soc_update_bits(codec, 0x3c, 0x0000, 0x4000); /*power off classd*/\r
- snd_soc_update_bits(codec, 0x3c, 0x8000, 0x8000); /*power on classab*/\r
- }\r
- else\r
- {\r
- snd_soc_update_bits(codec, 0x3c, 0x0000, 0x8000); /*power off classab*/\r
- snd_soc_update_bits(codec, 0x3c, 0x4000, 0x4000); /*power on classd*/\r
- }\r
- return 0;\r
-}\r
-\r
-\r
-\r
-static const struct snd_kcontrol_new rt5621_snd_controls[] = {\r
-SOC_DOUBLE("Speaker Playback Volume", RT5621_SPK_OUT_VOL, 8, 0, 31, 1), \r
-SOC_DOUBLE("Speaker Playback Switch", RT5621_SPK_OUT_VOL, 15, 7, 1, 1),\r
-SOC_DOUBLE("Headphone Playback Volume", RT5621_HP_OUT_VOL, 8, 0, 31, 1),\r
-SOC_DOUBLE("Headphone Playback Switch", RT5621_HP_OUT_VOL,15, 7, 1, 1),\r
-SOC_DOUBLE("AUX Playback Volume", RT5621_MONO_AUX_OUT_VOL, 8, 0, 31, 1),\r
-SOC_DOUBLE("AUX Playback Switch", RT5621_MONO_AUX_OUT_VOL, 15, 7, 1, 1),\r
-SOC_DOUBLE("PCM Playback Volume", RT5621_STEREO_DAC_VOL, 8, 0, 31, 1),\r
-SOC_DOUBLE("Line In Volume", RT5621_LINE_IN_VOL, 8, 0, 31, 1),\r
-SOC_SINGLE("Mic 1 Volume", RT5621_MIC_VOL, 8, 31, 1),\r
-SOC_SINGLE("Mic 2 Volume", RT5621_MIC_VOL, 0, 31, 1),\r
-SOC_ENUM("Mic 1 Boost", rt5621_enum[5]),\r
-SOC_ENUM("Mic 2 Boost", rt5621_enum[6]),\r
-SOC_ENUM_EXT("Speaker Amp Type", rt5621_enum[7], snd_soc_get_enum_double, rt5621_amp_sel_put),\r
-SOC_DOUBLE("AUX In Volume", RT5621_AUXIN_VOL, 8, 0, 31, 1),\r
-SOC_DOUBLE("Capture Volume", RT5621_ADC_REC_GAIN, 7, 0, 31, 0),\r
-};\r
-\r
-\r
-\r
-/* add non dapm controls */\r
-static int rt5621_add_controls(struct snd_soc_codec *codec)\r
-{\r
- int err, i;\r
-\r
- for (i = 0; i < ARRAY_SIZE(rt5621_snd_controls); i++) {\r
- err = snd_ctl_add(codec->card,\r
- snd_soc_cnew(&rt5621_snd_controls[i],codec, NULL));\r
- if (err < 0)\r
- return err;\r
- }\r
- return 0;\r
-}\r
-\r
-void hp_depop_mode2(struct snd_soc_codec *codec)\r
-{\r
- rt5621_write_mask(codec, 0x3e, 0x8000, 0x8000);\r
- rt5621_write_mask(codec, 0x04, 0x8080, 0x8080);\r
- rt5621_write_mask(codec, 0x3a, 0x0100, 0x0100);\r
- rt5621_write_mask(codec, 0x3c, 0x2000, 0x2000);\r
- rt5621_write_mask(codec, 0x3e, 0x0600, 0x0600);\r
- rt5621_write_mask(codec, 0x5e, 0x0200, 0x0200);\r
- schedule_timeout_uninterruptible(msecs_to_jiffies(300));\r
-}\r
-\r
-void aux_depop_mode2(struct snd_soc_codec *codec)\r
-{\r
- rt5621_write_mask(codec, 0x3e, 0x8000, 0x8000);\r
- rt5621_write_mask(codec, 0x06, 0x8080, 0x8080);\r
- rt5621_write_mask(codec, 0x3a, 0x0100, 0x0100);\r
- rt5621_write_mask(codec, 0x3c, 0x2000, 0x2000);\r
- rt5621_write_mask(codec, 0x3e, 0x6000, 0x6000);\r
- rt5621_write_mask(codec, 0x5e, 0x0020, 0x0200);\r
- schedule_timeout_uninterruptible(msecs_to_jiffies(300));\r
- rt5621_write_mask(codec, 0x3a, 0x0002, 0x0002);\r
- rt5621_write_mask(codec, 0x3a, 0x0001, 0x0001); \r
-}\r
-#if USE_DAPM_CONTROL\r
-\r
-/*\r
- * _DAPM_ Controls\r
- */\r
-\r
-/* We have to create a fake left and right HP mixers because\r
- * the codec only has a single control that is shared by both channels.\r
- * This makes it impossible to determine the audio path using the current\r
- * register map, thus we add a new (virtual) register to help determine the\r
- * audio route within the device.\r
- */\r
- static int mixer_event (struct snd_soc_dapm_widget *w, \r
- struct snd_kcontrol *kcontrol, int event)\r
-{\r
-\r
- u16 l, r, lineIn,mic1,mic2, aux, pcm;\r
-\r
- l = rt5621_read(w->codec, HPL_MIXER);\r
- r = rt5621_read(w->codec, HPR_MIXER);\r
- lineIn = rt5621_read(w->codec, RT5621_LINE_IN_VOL);\r
- mic2 = rt5621_read(w->codec, RT5621_MIC_ROUTING_CTRL);\r
- aux = rt5621_read(w->codec,RT5621_AUXIN_VOL);\r
- pcm = rt5621_read(w->codec, RT5621_STEREO_DAC_VOL);\r
-\r
-\r
- if (event & SND_SOC_DAPM_PRE_REG)\r
- return 0;\r
-\r
- if (l & 0x1 || r & 0x1)\r
- rt5621_write(w->codec, RT5621_STEREO_DAC_VOL, pcm & 0x7fff);\r
- else\r
- rt5621_write(w->codec, RT5621_STEREO_DAC_VOL, pcm | 0x8000);\r
-\r
- if (l & 0x2 || r & 0x2)\r
- rt5621_write(w->codec, RT5621_MIC_ROUTING_CTRL, mic2 & 0xff7f);\r
- else\r
- rt5621_write(w->codec, RT5621_MIC_ROUTING_CTRL, mic2 | 0x0080);\r
-\r
- mic1 = rt5621_read(w->codec, RT5621_MIC_ROUTING_CTRL);\r
- if (l & 0x4 || r & 0x4)\r
- rt5621_write(w->codec, RT5621_MIC_ROUTING_CTRL, mic1 & 0x7fff);\r
- else\r
- rt5621_write(w->codec, RT5621_MIC_ROUTING_CTRL, mic1 | 0x8000);\r
-\r
- if (l & 0x8 || r & 0x8)\r
- rt5621_write(w->codec, RT5621_AUXIN_VOL, aux & 0x7fff);\r
- else\r
- rt5621_write(w->codec, RT5621_AUXIN_VOL, aux | 0x8000);\r
-\r
- if (l & 0x10 || r & 0x10)\r
- rt5621_write(w->codec, RT5621_LINE_IN_VOL, lineIn & 0x7fff);\r
- else\r
- rt5621_write(w->codec, RT5621_LINE_IN_VOL, lineIn | 0x8000);\r
-\r
- return 0;\r
-}\r
-\r
-\r
-static int hp_event(struct snd_soc_dapm_widget *w, \r
- struct snd_kcontrol *kcontrol, int event)\r
-{\r
- struct snd_soc_codec *codec = w->codec;\r
- unsigned int reg = rt5621_read(codec, MISC_FUNC_REG);\r
- \r
- if (((reg & 0x03) != 0x00) && ((reg & 0x03) != 0x03))\r
- return 0;\r
- \r
- switch (event)\r
- {\r
- case SND_SOC_DAPM_POST_PMU:\r
- hp_depop_mode2(codec);\r
- rt5621_write_mask(codec, 0x04, 0x0000, 0x8080);\r
- rt5621_write_mask(codec, 0x3a, 0x0020, 0x0020);\r
- break;\r
- case SND_SOC_DAPM_POST_PMD:\r
- rt5621_write_mask(codec, 0x04, 0x8080, 0x8080);\r
- rt5621_write_mask(codec, 0x3a, 0x0000, 0x0010);\r
- rt5621_write_mask(codec, 0x3a, 0x0000, 0x0020);\r
- rt5621_write_mask(codec, 0x3e, 0x0000, 0x0600);\r
- break; \r
- }\r
- return 0;\r
-}\r
-\r
-static int aux_event(struct snd_soc_dapm_widget *w, \r
- struct snd_kcontrol *kcontrol, int event)\r
-{\r
- struct snd_soc_codec *codec = w->codec;\r
- unsigned int reg = rt5621_read(codec, MISC_FUNC_REG);\r
- \r
- if (((reg & 0x0c) != 0x00) && ((reg & 0x0c) != 0x0c))\r
- return 0;\r
- \r
- switch (event)\r
- {\r
- case SND_SOC_DAPM_POST_PMU:\r
- aux_depop_mode2(codec);\r
- rt5621_write_mask(codec, 0x06, 0x0000, 0x8080);\r
- break;\r
- case SND_SOC_DAPM_POST_PMD:\r
- rt5621_write_mask(codec, 0x06, 0x8080, 0x8080);\r
- rt5621_write_mask(codec, 0x3a, 0x0000, 0x0001);\r
- rt5621_write_mask(codec, 0x3a, 0x0000, 0x0002);\r
- rt5621_write_mask(codec, 0x3e, 0x0000, 0x6000); \r
- break;\r
- }\r
- return 0;\r
-}\r
-\r
-/* Left Headphone Mixers */\r
-static const struct snd_kcontrol_new rt5621_hpl_mixer_controls[] = {\r
-SOC_DAPM_SINGLE("LineIn Playback Switch", HPL_MIXER, 4, 1, 0),\r
-SOC_DAPM_SINGLE("AUXIN Playback Switch", HPL_MIXER, 3, 1, 0),\r
-SOC_DAPM_SINGLE("Mic1 Playback Switch", HPL_MIXER, 2, 1, 0),\r
-SOC_DAPM_SINGLE("Mic2 Playback Switch", HPL_MIXER, 1, 1, 0),\r
-SOC_DAPM_SINGLE("PCM Playback Switch", HPL_MIXER, 0, 1, 0),\r
-SOC_DAPM_SINGLE("RecordL Playback Switch", RT5621_ADC_REC_GAIN, 15, 1,1),\r
-};\r
-\r
-/* Right Headphone Mixers */\r
-static const struct snd_kcontrol_new rt5621_hpr_mixer_controls[] = {\r
-SOC_DAPM_SINGLE("LineIn Playback Switch", HPR_MIXER, 4, 1, 0),\r
-SOC_DAPM_SINGLE("AUXIN Playback Switch", HPR_MIXER, 3, 1, 0),\r
-SOC_DAPM_SINGLE("Mic1 Playback Switch", HPR_MIXER, 2, 1, 0),\r
-SOC_DAPM_SINGLE("Mic2 Playback Switch", HPR_MIXER, 1, 1, 0),\r
-SOC_DAPM_SINGLE("PCM Playback Switch", HPR_MIXER, 0, 1, 0),\r
-SOC_DAPM_SINGLE("RecordR Playback Switch", RT5621_ADC_REC_GAIN, 14, 1,1),\r
-};\r
-\r
-//Left Record Mixer\r
-static const struct snd_kcontrol_new rt5621_captureL_mixer_controls[] = {\r
-SOC_DAPM_SINGLE("Mic1 Capture Switch", RT5621_ADC_REC_MIXER, 14, 1, 1),\r
-SOC_DAPM_SINGLE("Mic2 Capture Switch", RT5621_ADC_REC_MIXER, 13, 1, 1),\r
-SOC_DAPM_SINGLE("LineInL Capture Switch",RT5621_ADC_REC_MIXER,12, 1, 1),\r
-SOC_DAPM_SINGLE("AUXIN Capture Switch", RT5621_ADC_REC_MIXER, 11, 1, 1),\r
-SOC_DAPM_SINGLE("HPMixerL Capture Switch", RT5621_ADC_REC_MIXER,10, 1, 1),\r
-SOC_DAPM_SINGLE("SPKMixer Capture Switch",RT5621_ADC_REC_MIXER,9, 1, 1),\r
-SOC_DAPM_SINGLE("MonoMixer Capture Switch",RT5621_ADC_REC_MIXER,8, 1, 1),\r
-};\r
-\r
-\r
-//Right Record Mixer\r
-static const struct snd_kcontrol_new rt5621_captureR_mixer_controls[] = {\r
-SOC_DAPM_SINGLE("Mic1 Capture Switch", RT5621_ADC_REC_MIXER, 6, 1, 1),\r
-SOC_DAPM_SINGLE("Mic2 Capture Switch", RT5621_ADC_REC_MIXER, 5, 1, 1),\r
-SOC_DAPM_SINGLE("LineInR Capture Switch",RT5621_ADC_REC_MIXER,4, 1, 1),\r
-SOC_DAPM_SINGLE("AUXIN Capture Switch", RT5621_ADC_REC_MIXER, 3, 1, 1),\r
-SOC_DAPM_SINGLE("HPMixerR Capture Switch", RT5621_ADC_REC_MIXER,2, 1, 1),\r
-SOC_DAPM_SINGLE("SPKMixer Capture Switch",RT5621_ADC_REC_MIXER,1, 1, 1),\r
-SOC_DAPM_SINGLE("MonoMixer Capture Switch",RT5621_ADC_REC_MIXER,0, 1, 1),\r
-};\r
-\r
-/* Speaker Mixer */\r
-static const struct snd_kcontrol_new rt5621_speaker_mixer_controls[] = {\r
-SOC_DAPM_SINGLE("LineIn Playback Switch", RT5621_LINE_IN_VOL, 14, 1, 1),\r
-SOC_DAPM_SINGLE("AUXIN Playback Switch", RT5621_AUXIN_VOL, 14, 1, 1),\r
-SOC_DAPM_SINGLE("Mic1 Playback Switch", RT5621_MIC_ROUTING_CTRL, 14, 1, 1),\r
-SOC_DAPM_SINGLE("Mic2 Playback Switch", RT5621_MIC_ROUTING_CTRL, 6, 1, 1),\r
-SOC_DAPM_SINGLE("PCM Playback Switch", RT5621_STEREO_DAC_VOL, 14, 1, 1),\r
-};\r
-\r
-\r
-/* Mono Mixer */\r
-static const struct snd_kcontrol_new rt5621_mono_mixer_controls[] = {\r
-SOC_DAPM_SINGLE("LineIn Playback Switch", RT5621_LINE_IN_VOL, 13, 1, 1),\r
-SOC_DAPM_SINGLE("Mic1 Playback Switch", RT5621_MIC_ROUTING_CTRL, 13, 1, 1),\r
-SOC_DAPM_SINGLE("Mic2 Playback Switch", RT5621_MIC_ROUTING_CTRL, 5, 1, 1),\r
-SOC_DAPM_SINGLE("AUXIN Playback Switch", RT5621_AUXIN_VOL, 13, 1, 1),\r
-SOC_DAPM_SINGLE("PCM Playback Switch", RT5621_STEREO_DAC_VOL, 13, 1, 1),\r
-SOC_DAPM_SINGLE("RecordL Playback Switch", RT5621_ADC_REC_GAIN, 13, 1,1),\r
-SOC_DAPM_SINGLE("RecordR Playback Switch", RT5621_ADC_REC_GAIN, 12, 1,1),\r
-};\r
-\r
-/* mono output mux */\r
-static const struct snd_kcontrol_new rt5621_mono_mux_controls =\r
-SOC_DAPM_ENUM("Route", rt5621_enum[4]);\r
-\r
-/* speaker left output mux */\r
-static const struct snd_kcontrol_new rt5621_hp_spk_mux_controls =\r
-SOC_DAPM_ENUM("Route", rt5621_enum[1]);\r
-\r
-\r
-/* headphone left output mux */\r
-static const struct snd_kcontrol_new rt5621_hpl_out_mux_controls =\r
-SOC_DAPM_ENUM("Route", rt5621_enum[2]);\r
-\r
-/* headphone right output mux */\r
-static const struct snd_kcontrol_new rt5621_hpr_out_mux_controls =\r
-SOC_DAPM_ENUM("Route", rt5621_enum[3]);\r
-\r
-static const struct snd_soc_dapm_widget rt5621_dapm_widgets[] = {\r
-SND_SOC_DAPM_MUX("Mono Out Mux", SND_SOC_NOPM, 0, 0,\r
- &rt5621_mono_mux_controls),\r
-SND_SOC_DAPM_MUX("Speaker Out Mux", SND_SOC_NOPM, 0, 0,\r
- &rt5621_hp_spk_mux_controls),\r
-SND_SOC_DAPM_MUX("Left Headphone Out Mux", SND_SOC_NOPM, 0, 0,\r
- &rt5621_hpl_out_mux_controls),\r
-SND_SOC_DAPM_MUX("Right Headphone Out Mux", SND_SOC_NOPM, 0, 0,\r
- &rt5621_hpr_out_mux_controls),\r
- \r
-SND_SOC_DAPM_MIXER_E("Left HP Mixer",RT5621_PWR_MANAG_ADD2, 5, 0,\r
- &rt5621_hpl_mixer_controls[0], ARRAY_SIZE(rt5621_hpl_mixer_controls),\r
- mixer_event, SND_SOC_DAPM_POST_REG), \r
-SND_SOC_DAPM_MIXER_E("Right HP Mixer",RT5621_PWR_MANAG_ADD2, 4, 0,\r
- &rt5621_hpr_mixer_controls[0], ARRAY_SIZE(rt5621_hpr_mixer_controls),\r
- mixer_event, SND_SOC_DAPM_POST_REG), \r
-SND_SOC_DAPM_MIXER("Mono Mixer", RT5621_PWR_MANAG_ADD2, 2, 0,\r
- &rt5621_mono_mixer_controls[0], ARRAY_SIZE(rt5621_mono_mixer_controls)),\r
- \r
-SND_SOC_DAPM_MIXER("Speaker Mixer", RT5621_PWR_MANAG_ADD2,3,0,\r
- &rt5621_speaker_mixer_controls[0], ARRAY_SIZE(rt5621_speaker_mixer_controls)), \r
- \r
-SND_SOC_DAPM_MIXER("Left Record Mixer", RT5621_PWR_MANAG_ADD2,1,0,\r
- &rt5621_captureL_mixer_controls[0], ARRAY_SIZE(rt5621_captureL_mixer_controls)), \r
-SND_SOC_DAPM_MIXER("Right Record Mixer", RT5621_PWR_MANAG_ADD2,0,0,\r
- &rt5621_captureR_mixer_controls[0], ARRAY_SIZE(rt5621_captureR_mixer_controls)), \r
- \r
-SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", RT5621_PWR_MANAG_ADD2,9, 0),\r
-SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", RT5621_PWR_MANAG_ADD2, 8, 0),\r
-\r
-SND_SOC_DAPM_MIXER("IIS Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),\r
-SND_SOC_DAPM_MIXER("HP Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),\r
-\r
-SND_SOC_DAPM_MIXER("Line Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),\r
-SND_SOC_DAPM_MIXER("AUXIN Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),\r
-\r
-SND_SOC_DAPM_ADC("Left ADC", "Left HiFi Capture", RT5621_PWR_MANAG_ADD2, 7, 0),\r
-SND_SOC_DAPM_ADC("Right ADC", "Right HiFi Capture", RT5621_PWR_MANAG_ADD2, 6, 0),\r
-\r
-SND_SOC_DAPM_PGA_E("Left Headphone", MISC_FUNC_REG, 0, 0, NULL, 0, \r
- hp_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),\r
-SND_SOC_DAPM_PGA_E("Right Headphone", MISC_FUNC_REG, 1, 0, NULL, 0, \r
- hp_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),\r
-\r
-SND_SOC_DAPM_PGA("Speaker PGA", RT5621_PWR_MANAG_ADD3, 12, 0, NULL, 0),\r
-\r
-SND_SOC_DAPM_PGA_E("AUXL Out", MISC_FUNC_REG, 2, 0, NULL, 0,\r
- aux_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),\r
-SND_SOC_DAPM_PGA_E("AUXR Out", MISC_FUNC_REG, 3, 0, NULL, 0,\r
- aux_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),\r
-\r
-SND_SOC_DAPM_PGA("Left Line In", RT5621_PWR_MANAG_ADD3, 7, 0, NULL, 0),\r
-SND_SOC_DAPM_PGA("Right Line In", RT5621_PWR_MANAG_ADD3, 6, 0, NULL, 0),\r
-SND_SOC_DAPM_PGA("Left AUX In", RT5621_PWR_MANAG_ADD3, 5, 0, NULL, 0),\r
-SND_SOC_DAPM_PGA("Right AUX In", RT5621_PWR_MANAG_ADD3, 4, 0, NULL, 0),\r
-\r
-SND_SOC_DAPM_PGA("Mic 1 PGA", RT5621_PWR_MANAG_ADD3, 3, 0, NULL, 0),\r
-SND_SOC_DAPM_PGA("Mic 2 PGA", RT5621_PWR_MANAG_ADD3, 2, 0, NULL, 0),\r
-SND_SOC_DAPM_PGA("Mic 1 Pre Amp", RT5621_PWR_MANAG_ADD3, 1, 0, NULL, 0),\r
-SND_SOC_DAPM_PGA("Mic 2 Pre Amp", RT5621_PWR_MANAG_ADD3, 0, 0, NULL, 0),\r
-\r
-SND_SOC_DAPM_MICBIAS("Mic Bias1", RT5621_PWR_MANAG_ADD1, 11, 0),\r
-\r
-SND_SOC_DAPM_OUTPUT("AUXL"),\r
-SND_SOC_DAPM_OUTPUT("AUXR"),\r
-SND_SOC_DAPM_OUTPUT("HPL"),\r
-SND_SOC_DAPM_OUTPUT("HPR"),\r
-SND_SOC_DAPM_OUTPUT("SPK"),\r
-\r
-SND_SOC_DAPM_INPUT("LINEL"),\r
-SND_SOC_DAPM_INPUT("LINER"),\r
-SND_SOC_DAPM_INPUT("AUXINL"),\r
-SND_SOC_DAPM_INPUT("AUXINR"),\r
-SND_SOC_DAPM_INPUT("MIC1"),\r
-SND_SOC_DAPM_INPUT("MIC2"),\r
-SND_SOC_DAPM_VMID("VMID"),\r
-};\r
-\r
-static const struct snd_soc_dapm_route audio_map[] = {\r
- /* left HP mixer */\r
- {"Left HP Mixer" , "LineIn Playback Switch" , "Left Line In"},\r
- {"Left HP Mixer" , "AUXIN Playback Switch" , "Left AUX In"},\r
- {"Left HP Mixer" , "Mic1 Playback Switch" , "Mic 1 PGA"},\r
- {"Left HP Mixer" , "Mic2 Playback Switch" , "Mic 2 PGA"},\r
- {"Left HP Mixer" , "PCM Playback Switch" , "Left DAC"},\r
- {"Left HP Mixer" , "RecordL Playback Switch" , "Left Record Mixer"},\r
- \r
- /* right HP mixer */\r
- {"Right HP Mixer" , "LineIn Playback Switch" , "Right Line In"},\r
- {"Right HP Mixer" , "AUXIN Playback Switch" , "Right AUX In"},\r
- {"Right HP Mixer" , "Mic1 Playback Switch" , "Mic 1 PGA"},\r
- {"Right HP Mixer" , "Mic2 Playback Switch" , "Mic 2 PGA"},\r
- {"Right HP Mixer" , "PCM Playback Switch" , "Right DAC"},\r
- {"Right HP Mixer" , "RecordR Playback Switch" , "Right Record Mixer"},\r
- \r
- /* virtual mixer - mixes left & right channels for spk and mono */\r
- {"IIS Mixer" , NULL , "Left DAC"},\r
- {"IIS Mixer" , NULL , "Right DAC"},\r
- {"Line Mixer" , NULL , "Right Line In"},\r
- {"Line Mixer" , NULL , "Left Line In"},\r
- {"AUXIN Mixer" , NULL , "Left AUX In"},\r
- {"AUXIN Mixer" , NULL , "Right AUX In"},\r
- {"HP Mixer" , NULL , "Left HP Mixer"},\r
- {"HP Mixer" , NULL , "Right HP Mixer"},\r
- \r
- /* speaker mixer */\r
- {"Speaker Mixer" , "LineIn Playback Switch" , "Line Mixer"},\r
- {"Speaker Mixer" , "AUXIN Playback Switch" , "AUXIN Mixer"},\r
- {"Speaker Mixer" , "Mic1 Playback Switch" , "Mic 1 PGA"},\r
- {"Speaker Mixer" , "Mic2 Playback Switch" , "Mic 2 PGA"},\r
- {"Speaker Mixer" , "PCM Playback Switch" , "IIS Mixer"},\r
-\r
-\r
- /* mono mixer */\r
- {"Mono Mixer" , "LineIn Playback Switch" , "Line Mixer"},\r
- {"Mono Mixer" , "Mic1 Playback Switch" , "Mic 1 PGA"},\r
- {"Mono Mixer" , "Mic2 Playback Switch" , "Mic 2 PGA"},\r
- {"Mono Mixer" , "PCM Playback Switch" , "IIS Mixer"},\r
- {"Mono Mixer" , "AUXIN Playback Switch" , "AUXIN Mixer"},\r
- {"Mono Mixer" , "RecordL Playback Switch" , "Left Record Mixer"},\r
- {"Mono Mixer" , "RecordR Playback Switch" , "Right Record Mixer"},\r
- \r
- /*Left record mixer */\r
- {"Left Record Mixer" , "Mic1 Capture Switch" , "Mic 1 Pre Amp"},\r
- {"Left Record Mixer" , "Mic2 Capture Switch" , "Mic 2 Pre Amp"},\r
- {"Left Record Mixer" , "LineInL Capture Switch" , "LINEL"},\r
- {"Left Record Mixer" , "AUXIN Capture Switch" , "AUXINL"},\r
- {"Left Record Mixer" , "HPMixerL Capture Switch" , "Left HP Mixer"},\r
- {"Left Record Mixer" , "SPKMixer Capture Switch" , "Speaker Mixer"},\r
- {"Left Record Mixer" , "MonoMixer Capture Switch" , "Mono Mixer"},\r
- \r
- /*Right record mixer */\r
- {"Right Record Mixer" , "Mic1 Capture Switch" , "Mic 1 Pre Amp"},\r
- {"Right Record Mixer" , "Mic2 Capture Switch" , "Mic 2 Pre Amp"},\r
- {"Right Record Mixer" , "LineInR Capture Switch" , "LINER"},\r
- {"Right Record Mixer" , "AUXIN Capture Switch" , "AUXINR"},\r
- {"Right Record Mixer" , "HPMixerR Capture Switch" , "Right HP Mixer"},\r
- {"Right Record Mixer" , "SPKMixer Capture Switch" , "Speaker Mixer"},\r
- {"Right Record Mixer" , "MonoMixer Capture Switch" , "Mono Mixer"}, \r
-\r
- /* headphone left mux */\r
- {"Left Headphone Out Mux" , "HPL mixer" , "Left HP Mixer"},\r
-\r
- /* headphone right mux */\r
- {"Right Headphone Out Mux", "HPR mixer", "Right HP Mixer"},\r
-\r
- /* speaker mux */\r
- {"Speaker Out Mux", "HP mixer", "HP Mixer"},\r
- {"Speaker Out Mux", "SPK mixer", "Speaker Mixer"},\r
- {"Speaker Out Mux", "Mono Mixer", "Mono Mixer"},\r
-\r
- /* mono mux */\r
- {"Mono Out Mux", "HP mixer", "HP Mixer"},\r
- {"Mono Out Mux", "SPK mixer", "Speaker Mixer"},\r
- {"Mono Out Mux", "Mono Mixer", "Mono Mixer"},\r
- \r
- /* output pga */\r
- {"HPL", NULL, "Left Headphone"},\r
- {"Left Headphone", NULL, "Left Headphone Out Mux"},\r
-\r
- {"HPR", NULL, "Right Headphone"},\r
- {"Right Headphone", NULL, "Right Headphone Out Mux"},\r
-\r
- {"SPK", NULL, "Speaker PGA"},\r
- {"Speaker PGA", NULL, "Speaker Out Mux"},\r
-\r
- {"AUXL", NULL, "AUXL Out"},\r
- {"AUXL Out", NULL, "Mono Out Mux"},\r
-\r
- {"AUXR", NULL, "AUXR Out"},\r
- {"AUXR Out", NULL, "Mono Out Mux"},\r
-\r
- /* input pga */\r
- {"Left Line In", NULL, "LINEL"},\r
- {"Right Line In", NULL, "LINER"},\r
- \r
- {"Left AUX In", NULL, "AUXINL"},\r
- {"Right AUX In", NULL, "AUXINR"},\r
- \r
- {"Mic 1 Pre Amp", NULL, "MIC1"},\r
- {"Mic 2 Pre Amp", NULL, "MIC2"}, \r
- {"Mic 1 PGA", NULL, "Mic 1 Pre Amp"},\r
- {"Mic 2 PGA", NULL, "Mic 2 Pre Amp"},\r
-\r
- /* left ADC */\r
- {"Left ADC", NULL, "Left Record Mixer"},\r
-\r
- /* right ADC */\r
- {"Right ADC", NULL, "Right Record Mixer"},\r
- \r
-};\r
-\r
-static int rt5621_add_widgets(struct snd_soc_codec *codec)\r
-{\r
- snd_soc_dapm_new_controls(codec, rt5621_dapm_widgets,\r
- ARRAY_SIZE(rt5621_dapm_widgets));\r
- snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));\r
- snd_soc_dapm_new_widgets(codec);\r
-\r
- return 0;\r
-}\r
-\r
-#else\r
-\r
-static int rt5621_pcm_hw_prepare(struct snd_pcm_substream *substream,\r
- struct snd_soc_dai *codec_dai)\r
-{\r
-\r
- struct snd_soc_codec *codec = codec_dai->codec;\r
- int stream = substream->stream;\r
-\r
- switch (stream)\r
- {\r
- case SNDRV_PCM_STREAM_PLAYBACK:\r
-\r
- rt5621_ChangeCodecPowerStatus(codec,POWER_STATE_D1_PLAYBACK); //power on dac to hp and speaker out\r
- \r
- rt5621_AudioOutEnable(codec,RT_WAVOUT_SPK,0); //unmute speaker out\r
- \r
- rt5621_AudioOutEnable(codec,RT_WAVOUT_HP,0); //unmute hp out\r
-\r
- break;\r
- case SNDRV_PCM_STREAM_CAPTURE:\r
-\r
- rt5621_ChangeCodecPowerStatus(codec,POWER_STATE_D1_RECORD); //power on input to adc\r
-\r
- Enable_ADC_Input_Source(codec,RT_WAVIN_L_MIC1|RT_WAVIN_R_MIC1,1); //enable record source from mic1\r
-\r
- break; \r
- }\r
- \r
- return 0;\r
-}\r
-\r
-#endif\r
-/* PLL divisors */\r
-struct _pll_div {\r
- u32 pll_in;\r
- u32 pll_out;\r
- u16 regvalue;\r
-};\r
-\r
-static const struct _pll_div codec_pll_div[] = {\r
- \r
- { 2048000, 8192000, 0x0ea0}, \r
- { 3686400, 8192000, 0x4e27}, \r
- { 12000000, 8192000, 0x456b}, \r
- { 13000000, 8192000, 0x495f},\r
- { 13100000, 8192000, 0x0320}, \r
- { 2048000, 11289600, 0xf637},\r
- { 3686400, 11289600, 0x2f22}, \r
- { 12000000, 11289600, 0x3e2f}, \r
- { 13000000, 11289600, 0x4d5b},\r
- { 13100000, 11289600, 0x363b}, \r
- { 2048000, 16384000, 0x1ea0},\r
- { 3686400, 16384000, 0x9e27}, \r
- { 12000000, 16384000, 0x452b}, \r
- { 13000000, 16384000, 0x542f},\r
- { 13100000, 16384000, 0x03a0}, \r
- { 2048000, 16934400, 0xe625},\r
- { 3686400, 16934400, 0x9126}, \r
- { 12000000, 16934400, 0x4d2c}, \r
- { 13000000, 16934400, 0x742f},\r
- { 13100000, 16934400, 0x3c27}, \r
- { 2048000, 22579200, 0x2aa0},\r
- { 3686400, 22579200, 0x2f20}, \r
- { 12000000, 22579200, 0x7e2f}, \r
- { 13000000, 22579200, 0x742f},\r
- { 13100000, 22579200, 0x3c27}, \r
- { 2048000, 24576000, 0x2ea0},\r
- { 3686400, 24576000, 0xee27}, \r
- { 12000000, 24576000, 0x2915}, \r
- { 13000000, 24576000, 0x772e},\r
- { 13100000, 24576000, 0x0d20}, \r
-};\r
-\r
-static const struct _pll_div codec_bclk_pll_div[] = {\r
-\r
- { 1536000, 24576000, 0x3ea0}, \r
- { 3072000, 24576000, 0x1ea0},\r
- { 512000, 24576000, 0x8e90},\r
- { 256000, 24576000, 0xbe80},\r
- { 2822400, 11289600, 0x1ee0}, //flove040711\r
- { 3072000, 12288000, 0x1ee0}, //flove040711 \r
-};\r
-\r
-\r
-static int rt5621_set_dai_pll(struct snd_soc_dai *codec_dai,\r
- int pll_id, unsigned int freq_in, unsigned int freq_out)\r
-{\r
- int i;\r
- int ret = -EINVAL;\r
- struct snd_soc_codec *codec = codec_dai->codec;\r
-\r
- if (pll_id < RT5621_PLL_FR_MCLK || pll_id > RT5621_PLL_FR_BCLK)\r
- return -EINVAL;\r
-\r
- //rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD2, 0x0000,0x1000); //disable PLL power \r
- \r
- if (!freq_in || !freq_out) {\r
-\r
- return 0;\r
- } \r
-\r
- if (RT5621_PLL_FR_MCLK == pll_id) {\r
- for (i = 0; i < ARRAY_SIZE(codec_pll_div); i++) {\r
- \r
- if (codec_pll_div[i].pll_in == freq_in && codec_pll_div[i].pll_out == freq_out)\r
- {\r
- rt5621_write_mask(codec, RT5621_GLOBAL_CLK_CTRL_REG, 0x0000, 0x4000); \r
- rt5621_write(codec,RT5621_PLL_CTRL,codec_pll_div[i].regvalue);//set PLL parameter \r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD2, 0x1000,0x1000); //enable PLL power \r
- ret = 0;\r
- }\r
- }\r
- }\r
- else if (RT5621_PLL_FR_BCLK == pll_id)\r
- {\r
- for (i = 0; i < ARRAY_SIZE(codec_bclk_pll_div); i++)\r
- {\r
- if ((freq_in == codec_bclk_pll_div[i].pll_in) && (freq_out == codec_bclk_pll_div[i].pll_out))\r
- {\r
- rt5621_write_mask(codec, RT5621_GLOBAL_CLK_CTRL_REG, 0x4000, 0x4000);\r
- rt5621_write(codec,RT5621_PLL_CTRL,codec_bclk_pll_div[i].regvalue);//set PLL parameter \r
- rt5621_write_mask(codec,RT5621_PWR_MANAG_ADD2, 0x1000,0x1000); //enable PLL power \r
- ret = 0;\r
- }\r
- }\r
- }\r
-\r
- rt5621_write_mask(codec,RT5621_GLOBAL_CLK_CTRL_REG,0x8000,0x8000);//Codec sys-clock from PLL \r
- return ret;\r
-}\r
-\r
-\r
-struct _coeff_div {\r
- u32 mclk;\r
- u32 rate;\r
- u16 fs;\r
- u16 regvalue;\r
-};\r
-\r
-/* codec hifi mclk (after PLL) clock divider coefficients */\r
-static const struct _coeff_div coeff_div[] = {\r
- /* 8k */\r
- { 8192000, 8000, 256*4, 0x2a2d},\r
- {12288000, 8000, 384*4, 0x2c2f},\r
-\r
- /* 11.025k */\r
- {11289600, 11025, 256*4, 0x2a2d},\r
- {16934400, 11025, 384*4, 0x2c2f},\r
-\r
- /* 16k */\r
- {12288000, 16000, 384*2, 0x1c2f},\r
- {16384000, 16000, 256*4, 0x2a2d},\r
- {24576000, 16000, 384*4, 0x2c2f},\r
-\r
- /* 22.05k */ \r
- {11289600, 22050, 256*2, 0x1a2d},\r
- {16934400, 22050, 384*2, 0x1c2f},\r
-\r
- /* 32k */\r
- {12288000, 32000, 384 , 0x0c2f},\r
- {16384000, 32000, 256*2, 0x1a2d},\r
- {24576000, 32000, 384*2, 0x1c2f},\r
-\r
- /* 44.1k */\r
- {11289600, 44100, 256*1, 0x0a2d},\r
- {22579200, 44100, 256*2, 0x1a2d},\r
- {45158400, 44100, 256*4, 0x2a2d}, \r
-\r
- /* 48k */\r
- {12288000, 48000, 256*1, 0x0a2d},\r
- {24576000, 48000, 256*2, 0x1a2d},\r
- {49152000, 48000, 256*4, 0x2a2d},\r
-\r
-};\r
-\r
-\r
-\r
-static int get_coeff(int mclk, int rate)\r
-{\r
- int i;\r
- \r
- printk("get_coeff mclk=%d,rate=%d\n",mclk,rate);\r
-\r
- for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {\r
- if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)\r
- return i;\r
- }\r
- return -EINVAL;\r
-}\r
-\r
-\r
-\r
-\r
-/*\r
- * Clock after PLL and dividers\r
- */\r
- /*in this driver, you have to set sysclk to be 24576000,\r
- * but you don't need to give a clk to be 24576000, our \r
- * internal pll will generate this clock! so it won't make\r
- * you any difficult.\r
- */\r
-static int rt5621_set_dai_sysclk(struct snd_soc_dai *codec_dai,\r
- int clk_id, unsigned int freq, int dir)\r
-{\r
- struct snd_soc_codec *codec = codec_dai->codec;\r
- struct rt5621_priv *rt5621 = codec->private_data;\r
-\r
- switch (freq) {\r
- case 24576000:\r
- rt5621->sysclk = freq;\r
- return 0;\r
- }\r
- return 0;\r
-}\r
-\r
-\r
-static int rt5621_set_dai_fmt(struct snd_soc_dai *codec_dai,\r
- unsigned int fmt)\r
-{\r
- struct snd_soc_codec *codec = codec_dai->codec;\r
- u16 iface = 0;\r
-\r
- /* set master/slave audio interface */\r
- switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {\r
- case SND_SOC_DAIFMT_CBM_CFM:\r
- iface = 0x0000;\r
- break;\r
- case SND_SOC_DAIFMT_CBS_CFS:\r
- iface = 0x8000;\r
- break;\r
- default:\r
- return -EINVAL;\r
- }\r
-\r
- /* interface format */\r
- switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {\r
- case SND_SOC_DAIFMT_I2S:\r
- iface |= 0x0000;\r
- break;\r
- case SND_SOC_DAIFMT_RIGHT_J:\r
- iface |= 0x0001;\r
- break;\r
- case SND_SOC_DAIFMT_LEFT_J:\r
- iface |= 0x0002;\r
- break;\r
- case SND_SOC_DAIFMT_DSP_A:\r
- iface |= 0x0003;\r
- break;\r
- case SND_SOC_DAIFMT_DSP_B:\r
- iface |= 0x4003;\r
- break;\r
- default:\r
- return -EINVAL;\r
- }\r
-\r
- /* clock inversion */\r
- switch (fmt & SND_SOC_DAIFMT_INV_MASK) {\r
- case SND_SOC_DAIFMT_NB_NF:\r
- iface |= 0x0000;\r
- break;\r
- case SND_SOC_DAIFMT_IB_NF:\r
- iface |= 0x0100;\r
- break;\r
- default:\r
- return -EINVAL;\r
- }\r
-\r
- rt5621_write(codec,RT5621_AUDIO_INTERFACE,iface);\r
- return 0;\r
-}\r
-\r
-\r
-static int rt5621_pcm_hw_params(struct snd_pcm_substream *substream,\r
- struct snd_pcm_hw_params *params,\r
- struct snd_soc_dai *codec_dai)\r
-{\r
- struct snd_soc_pcm_runtime *rtd = substream->private_data;\r
- struct snd_soc_device *socdev = rtd->socdev;\r
- struct snd_soc_codec *codec = socdev ->card->codec;\r
- struct rt5621_priv *rt5621 = codec->private_data;\r
- u16 iface=rt5621_read(codec,RT5621_AUDIO_INTERFACE)&0xfff3;\r
- int coeff = get_coeff(rt5621->sysclk, params_rate(params));\r
-\r
- printk("rt5621_pcm_hw_params\n");\r
- if (coeff < 0)\r
- coeff = get_coeff(24576000, params_rate(params)); /*if not set sysclk, default to be 24.576MHz*/\r
-\r
- /* bit size */\r
- switch (params_format(params)) {\r
- case SNDRV_PCM_FORMAT_S16_LE:\r
- iface |= 0x0000;\r
- break;\r
- case SNDRV_PCM_FORMAT_S20_3LE:\r
- iface |= 0x0004;\r
- break;\r
- case SNDRV_PCM_FORMAT_S24_LE:\r
- iface |= 0x0008;\r
- break;\r
- case SNDRV_PCM_FORMAT_S32_LE:\r
- iface |= 0x000c;\r
- break;\r
- }\r
-\r
- /* set iface & srate */\r
- rt5621_write(codec, RT5621_AUDIO_INTERFACE, iface);\r
-\r
- if (coeff >= 0)\r
- rt5621_write(codec, RT5621_STEREO_AD_DA_CLK_CTRL, coeff_div[coeff].regvalue);\r
-// else\r
-// {\r
-// printk(KERN_ERR "cant find matched sysclk and rate config\n");\r
-// return -EINVAL;\r
- \r
-// }\r
- return 0;\r
-}\r
-\r
-#if !USE_DAPM_CONTROL\r
-static int rt5621_set_bias_level(struct snd_soc_codec *codec, \r
- enum snd_soc_bias_level level)\r
-{\r
- switch (level) {\r
- case SND_SOC_BIAS_ON:\r
- break;\r
- case SND_SOC_BIAS_PREPARE:\r
- break;\r
- case SND_SOC_BIAS_STANDBY:\r
- break;\r
- case SND_SOC_BIAS_OFF:\r
-\r
- rt5621_write_mask(codec, 0x02, 0x8080, 0x8080);\r
- rt5621_write_mask(codec, 0x04, 0x8080, 0x8080);\r
- rt5621_write(codec, 0x3e, 0x0000);\r
- rt5621_write(codec, 0x3c, 0x0000);\r
- rt5621_write(codec, 0x3a, 0x0000);\r
- break; \r
- }\r
- codec->bias_level = level;\r
- return 0;\r
-}\r
-#else\r
-static int rt5621_set_bias_level(struct snd_soc_codec *codec, \r
- enum snd_soc_bias_level level)\r
-{\r
- switch (level) {\r
- case SND_SOC_BIAS_ON:\r
- break;\r
- case SND_SOC_BIAS_PREPARE:\r
- break;\r
- case SND_SOC_BIAS_STANDBY:\r
-\r
- break;\r
- case SND_SOC_BIAS_OFF:\r
-\r
- rt5621_write_mask(codec, 0x02, 0x8080, 0x8080);\r
- rt5621_write_mask(codec, 0x04, 0x8080, 0x8080);\r
- rt5621_write(codec, 0x3e, 0x0000);\r
- rt5621_write(codec, 0x3c, 0x0000);\r
- rt5621_write(codec, 0x3a, 0x0000);\r
- break; \r
- }\r
- codec->bias_level = level;\r
- return 0;\r
-}\r
-#endif\r
-\r
-\r
-\r
-\r
-\r
-#if !USE_DAPM_CONTROL\r
-\r
-static void rt5621_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *codec_dai)\r
-{\r
- struct snd_soc_pcm_runtime *rtd = substream->private_data;\r
- struct snd_soc_device *socdev = rtd->socdev;\r
- struct snd_soc_codec *codec = socdev->card->codec;\r
- int stream = substream->stream;\r
- \r
- switch (stream)\r
- {\r
- case SNDRV_PCM_STREAM_PLAYBACK:\r
-\r
- rt5621_AudioOutEnable(codec,RT_WAVOUT_SPK,1); //mute speaker out\r
- \r
- rt5621_AudioOutEnable(codec,RT_WAVOUT_HP,1); //mute hp out\r
-\r
- rt5621_ChangeCodecPowerStatus(codec,POWER_STATE_D2_PLAYBACK); //power off dac to hp and speaker out\r
- \r
-\r
-\r
- break;\r
- case SNDRV_PCM_STREAM_CAPTURE:\r
-\r
- Enable_ADC_Input_Source(codec,RT_WAVIN_L_MIC1|RT_WAVIN_R_MIC1,0); //disable record source from mic1\r
-\r
- rt5621_ChangeCodecPowerStatus(codec,POWER_STATE_D2_RECORD);\r
- \r
-\r
- break; \r
- } \r
-}\r
-\r
-#endif\r
-\r
-\r
-#define RT5621_HIFI_RATES SNDRV_PCM_RATE_8000_48000\r
-\r
-#define RT5621_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\\r
- SNDRV_PCM_FMTBIT_S24_LE)\r
-\r
-struct snd_soc_dai_ops rt5621_hifi_ops = {\r
- .hw_params = rt5621_pcm_hw_params, \r
- .set_fmt = rt5621_set_dai_fmt,\r
- .set_sysclk = rt5621_set_dai_sysclk,\r
- .set_pll = rt5621_set_dai_pll,\r
-#if !USE_DAPM_CONTROL\r
- .prepare = rt5621_pcm_hw_prepare,\r
- .shutdown = rt5621_shutdown,\r
-#endif\r
- \r
-};\r
-\r
-struct snd_soc_dai rt5621_dai = { \r
- \r
- .name = "RT5621",\r
- .playback = {\r
- .stream_name = "HiFi Playback",\r
- .channels_min = 1,\r
- .channels_max = 2,\r
- .rates = RT5621_HIFI_RATES,\r
- .formats = RT5621_FORMATS,},\r
- .capture = {\r
- .stream_name = "HiFi Capture",\r
- .channels_min = 1,\r
- .channels_max = 2,\r
- .rates = RT5621_HIFI_RATES,\r
- .formats = RT5621_FORMATS,},\r
-\r
- .ops = &rt5621_hifi_ops,\r
-};\r
-\r
-\r
-EXPORT_SYMBOL_GPL(rt5621_dai);\r
-\r
-static ssize_t rt5621_index_reg_show(struct device *dev, \r
- struct device_attribute *attr, char *buf)\r
-{\r
- struct snd_soc_device *socdev = dev_get_drvdata(dev);\r
- struct snd_soc_codec *codec = socdev ->card->codec;\r
- int count = 0;\r
- int value;\r
- int i; \r
- \r
- count += sprintf(buf, "%s index register\n", codec->name);\r
-\r
- for (i = 0; i < 0x60; i++) {\r
- count += sprintf(buf + count, "index-%2x ", i);\r
- if (count >= PAGE_SIZE - 1)\r
- break;\r
- value = rt5621_read_index(codec, i);\r
- count += snprintf(buf + count, PAGE_SIZE - count, "0x%4x", value);\r
-\r
- if (count >= PAGE_SIZE - 1)\r
- break;\r
-\r
- count += snprintf(buf + count, PAGE_SIZE - count, "\n");\r
- if (count >= PAGE_SIZE - 1)\r
- break;\r
- }\r
-\r
- if (count >= PAGE_SIZE)\r
- count = PAGE_SIZE - 1;\r
- \r
- return count;\r
- \r
-}\r
-\r
-static DEVICE_ATTR(index_reg, 0444, rt5621_index_reg_show, NULL);\r
-\r
-#if defined(CONFIG_SND_HWDEP)\r
-#if REALTEK_HWDEP\r
-\r
-#define RT_CE_CODEC_HWDEP_NAME "rt56xx hwdep "\r
-\r
-static int rt56xx_hwdep_open(struct snd_hwdep *hw, struct file *file)\r
-{\r
- printk("enter %s\n", __func__);\r
- return 0;\r
-}\r
-\r
-static int rt56xx_hwdep_release(struct snd_hwdep *hw, struct file *file)\r
-{\r
- printk("enter %s\n", __func__);\r
- return 0;\r
-}\r
-\r
-\r
-static int rt56xx_hwdep_ioctl_common(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg)\r
-{\r
- struct rt56xx_cmd rt56xx;\r
- struct rt56xx_cmd __user *_rt56xx = arg;\r
- struct rt56xx_reg_state *buf;\r
- struct rt56xx_reg_state *p;\r
- struct snd_soc_codec *codec = hw->private_data;\r
-\r
- if (copy_from_user(&rt56xx, _rt56xx, sizeof(rt56xx)))\r
- return -EFAULT;\r
- buf = kmalloc(sizeof(*buf) * rt56xx.number, GFP_KERNEL);\r
- if (buf == NULL)\r
- return -ENOMEM;\r
- if (copy_from_user(buf, rt56xx.buf, sizeof(*buf) * rt56xx.number)) {\r
- goto err;\r
- }\r
- switch (cmd) {\r
- case RT_READ_CODEC_REG_IOCTL:\r
- for (p = buf; p < buf + rt56xx.number; p++)\r
- {\r
- p->reg_value = codec->read(codec, p->reg_index);\r
- }\r
- if (copy_to_user(rt56xx.buf, buf, sizeof(*buf) * rt56xx.number))\r
- goto err;\r
- \r
- break;\r
- case RT_WRITE_CODEC_REG_IOCTL:\r
- for (p = buf; p < buf + rt56xx.number; p++)\r
- codec->write(codec, p->reg_index, p->reg_value);\r
- break;\r
- }\r
-\r
- kfree(buf);\r
- return 0;\r
-\r
-err:\r
- kfree(buf);\r
- return -EFAULT;\r
- \r
-}\r
-\r
-static int rt56xx_codec_dump_reg(struct snd_hwdep *hw, struct file *file, unsigned long arg)\r
-{\r
- struct rt56xx_cmd rt56xx;\r
- struct rt56xx_cmd __user *_rt56xx = arg;\r
- struct rt56xx_reg_state *buf;\r
- struct snd_soc_codec *codec = hw->private_data;\r
- int number = codec->reg_cache_size;\r
- int i;\r
-\r
- printk(KERN_DEBUG "enter %s, number = %d\n", __func__, number); \r
- if (copy_from_user(&rt56xx, _rt56xx, sizeof(rt56xx)))\r
- return -EFAULT;\r
- \r
- buf = kmalloc(sizeof(*buf) * number, GFP_KERNEL);\r
- if (buf == NULL)\r
- return -ENOMEM;\r
-\r
- for (i = 0; i < number; i++)\r
- {\r
- buf[i].reg_index = i << 1;\r
- buf[i].reg_value = codec->read(codec, buf[i].reg_index);\r
- }\r
- if (copy_to_user(rt56xx.buf, buf, sizeof(*buf) * i))\r
- goto err;\r
- rt56xx.number = number;\r
- if (copy_to_user(_rt56xx, &rt56xx, sizeof(rt56xx)))\r
- goto err;\r
- kfree(buf);\r
- return 0;\r
-err:\r
- kfree(buf);\r
- return -EFAULT;\r
- \r
-}\r
-\r
-static int rt56xx_hwdep_ioctl(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg)\r
-{\r
- if (cmd == RT_READ_ALL_CODEC_REG_IOCTL)\r
- {\r
- return rt56xx_codec_dump_reg(hw, file, arg);\r
- }\r
- else\r
- {\r
- return rt56xx_hwdep_ioctl_common(hw, file, cmd, arg);\r
- }\r
-}\r
-\r
-static int realtek_ce_init_hwdep(struct snd_soc_codec *codec)\r
-{\r
- struct snd_hwdep *hw;\r
- struct snd_card *card = codec->card;\r
- int err;\r
-\r
- if ((err = snd_hwdep_new(card, RT_CE_CODEC_HWDEP_NAME, 0, &hw)) < 0)\r
- return err;\r
- \r
- strcpy(hw->name, RT_CE_CODEC_HWDEP_NAME);\r
- hw->private_data = codec;\r
- hw->ops.open = rt56xx_hwdep_open;\r
- hw->ops.release = rt56xx_hwdep_release;\r
- hw->ops.ioctl = rt56xx_hwdep_ioctl;\r
- return 0;\r
-}\r
-\r
-#endif\r
-#endif\r
-\r
-static void rt5621_work(struct work_struct *work)\r
-{\r
- struct snd_soc_codec *codec =\r
- container_of(work, struct snd_soc_codec, delayed_work.work);\r
- \r
- rt5621_set_bias_level(codec, codec->bias_level);\r
-}\r
-\r
-\r
-static int rt5621_suspend(struct platform_device *pdev, pm_message_t state)\r
-{\r
- struct snd_soc_device *socdev = platform_get_drvdata(pdev);\r
- struct snd_soc_codec *codec = socdev ->card->codec;\r
-\r
- /* we only need to suspend if we are a valid card */\r
- if(!codec->card)\r
- return 0;\r
- \r
- rt5621_set_bias_level(codec, SND_SOC_BIAS_STANDBY);\r
- return 0;\r
-}\r
-\r
-static int rt5621_resume(struct platform_device *pdev)\r
-{\r
- struct snd_soc_device *socdev = platform_get_drvdata(pdev);\r
- struct snd_soc_codec *codec = socdev ->card->codec;\r
- int i;\r
- u8 data[3];\r
- u16 *cache = codec->reg_cache;\r
-\r
- /* we only need to resume if we are a valid card */\r
- if(!codec->card)\r
- return 0;\r
-\r
- /* Sync reg_cache with the hardware */ \r
-\r
- for (i = 0; i < ARRAY_SIZE(rt5621_reg); i++) {\r
- if (i == RT5621_RESET)\r
- continue;\r
- data[0] =i << 1; \r
- data[1] = (0xFF00 & cache[i]) >> 8;\r
- data[2] = 0x00FF & cache[i]; \r
- codec->hw_write(codec->control_data, data, 3);\r
- } \r
-\r
- rt5621_set_bias_level(codec, SND_SOC_BIAS_STANDBY);\r
- \r
- /* charge rt5621 caps */\r
- \r
- if (codec->suspend_bias_level == SND_SOC_BIAS_ON) {\r
- rt5621_set_bias_level(codec, SND_SOC_BIAS_PREPARE);\r
- codec->bias_level = SND_SOC_BIAS_ON;\r
- schedule_delayed_work(&codec->delayed_work,\r
- msecs_to_jiffies(caps_charge));\r
- }\r
- return 0;\r
-}\r
-\r
-\r
-/*\r
- * initialise the RT5621 driver\r
- * register the mixer and dsp interfaces with the kernel\r
- */\r
-static int rt5621_init(struct snd_soc_device *socdev)\r
-{\r
- struct snd_soc_codec *codec = socdev ->card->codec;\r
- int ret = 0;\r
-\r
- printk(KERN_INFO "alsa version is 1.0.21, codec driver version is 0.04\n");\r
- codec->name = "RT5621";\r
- codec->owner = THIS_MODULE;\r
- codec->read = rt5621_read;\r
- codec->write = rt5621_write;\r
- codec->set_bias_level = rt5621_set_bias_level;\r
- codec->dai = &rt5621_dai;\r
- codec->num_dai = 1;\r
- codec->reg_cache_step = 2;\r
- codec->reg_cache_size = ARRAY_SIZE(rt5621_reg) * 2;\r
- codec->reg_cache = kmemdup(rt5621_reg, sizeof(rt5621_reg), GFP_KERNEL);\r
-\r
- if (codec->reg_cache == NULL)\r
- return -ENOMEM;\r
- \r
- /* register pcms */\r
- ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);\r
- if (ret < 0) {\r
- printk(KERN_ERR "rt5621: failed to create pcms\n");\r
- goto pcm_err;\r
- }\r
-\r
-\r
- rt5621_reset(codec);\r
- rt5621_write(codec, RT5621_PWR_MANAG_ADD3, 0x8000);//enable Main bias\r
- rt5621_write(codec, RT5621_PWR_MANAG_ADD2, 0x2000);//enable Vref\r
-\r
- hp_depop_mode2(codec);\r
-\r
- rt5621_init_reg(codec);\r
- rt5621_set_bias_level(codec, SND_SOC_BIAS_PREPARE);\r
- codec->bias_level = SND_SOC_BIAS_STANDBY;\r
- schedule_delayed_work(&codec->delayed_work,\r
- msecs_to_jiffies(caps_charge));\r
- \r
- rt5621_add_controls(codec);\r
-\r
- #if USE_DAPM_CONTROL\r
-\r
- rt5621_add_widgets(codec); \r
-\r
- #endif\r
-\r
- #if defined(CONFIG_SND_HWDEP)\r
- #if REALTEK_HWDEP\r
-\r
- realtek_ce_init_hwdep(codec);\r
-\r
- #endif\r
- #endif\r
-\r
- ret = snd_soc_init_card(socdev);\r
-\r
- if (ret < 0) {\r
- printk(KERN_ERR "rt5621: failed to register card\n");\r
- goto card_err;\r
- }\r
- return ret;\r
-\r
-card_err:\r
- snd_soc_free_pcms(socdev);\r
- snd_soc_dapm_free(socdev);\r
-pcm_err:\r
- kfree(codec->reg_cache);\r
- return ret;\r
-}\r
-\r
-static int rt5621_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id)\r
-{\r
- struct snd_soc_device *socdev = rt5621_socdev;\r
- struct snd_soc_codec *codec = socdev ->card->codec;\r
- int ret;\r
-\r
- i2c_set_clientdata(i2c, codec);\r
- codec->control_data = i2c;\r
-\r
- ret = rt5621_init(socdev);\r
- if (ret < 0)\r
- pr_err("failed to initialise rt5621\n");\r
-\r
- return ret;\r
-}\r
-\r
-\r
-static int rt5621_i2c_remove(struct i2c_client *client)\r
-{\r
- struct snd_soc_codec *codec = i2c_get_clientdata(client);\r
- kfree(codec->reg_cache);\r
- return 0;\r
-}\r
-\r
-static const struct i2c_device_id rt5621_i2c_id[] = {\r
- {"ALC5621", 0},\r
- {}\r
-};\r
-MODULE_DEVICE_TABLE(i2c, rt5621_i2c_id);\r
-static struct i2c_driver rt5621_i2c_driver = {\r
- .driver = {\r
- .name = "RT5621 I2C Codec",\r
- .owner = THIS_MODULE,\r
- },\r
- .probe = rt5621_i2c_probe,\r
- .remove = rt5621_i2c_remove,\r
- .id_table = rt5621_i2c_id,\r
-};\r
-\r
-static int rt5621_add_i2c_device(struct platform_device *pdev,\r
- const struct rt5621_setup_data *setup)\r
-{\r
-#if 0\r
- struct i2c_board_info info;\r
- struct i2c_adapter *adapter;\r
- struct i2c_client *client;\r
-#endif\r
- int ret;\r
- ret = i2c_add_driver(&rt5621_i2c_driver);\r
- if (ret != 0) {\r
- dev_err(&pdev->dev, "can't add i2c driver\n");\r
- return ret;\r
- }\r
-#if 0\r
- memset(&info, 0, sizeof(struct i2c_board_info));\r
- info.addr = setup->i2c_address;\r
- strlcpy(info.type, "rt5621", I2C_NAME_SIZE);\r
-\r
- adapter = i2c_get_adapter(setup->i2c_bus);\r
- if (!adapter) {\r
- dev_err(&pdev->dev, "can't get i2c adapter %d\n",\r
- setup->i2c_bus);\r
- goto err_driver;\r
- }\r
-\r
- client = i2c_new_device(adapter, &info);\r
- i2c_put_adapter(adapter);\r
- if (!client) {\r
- dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",\r
- (unsigned int)info.addr);\r
- goto err_driver;\r
- }\r
-#endif\r
- return 0;\r
-\r
-#if 0\r
-err_driver:\r
- i2c_del_driver(&rt5621_i2c_driver);\r
- return -ENODEV;\r
-#endif\r
-}\r
-\r
-\r
-static int rt5621_probe(struct platform_device *pdev)\r
-{\r
- struct snd_soc_device *socdev = platform_get_drvdata(pdev);\r
- struct rt5621_setup_data *setup = socdev->codec_data;\r
- struct snd_soc_codec *codec;\r
- struct rt5621_priv *rt5621;\r
- int ret;\r
-\r
- pr_info("RT5621 Audio Codec %s\n", RT5621_VERSION);\r
-\r
- codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);\r
- if (codec == NULL)\r
- return -ENOMEM;\r
-\r
- rt5621 = kzalloc(sizeof(struct rt5621_priv), GFP_KERNEL);\r
- if (rt5621 == NULL) {\r
- kfree(codec);\r
- return -ENOMEM;\r
- }\r
- codec->private_data = rt5621;\r
- socdev ->card->codec = codec;\r
- mutex_init(&codec->mutex);\r
- INIT_LIST_HEAD(&codec->dapm_widgets);\r
- INIT_LIST_HEAD(&codec->dapm_paths);\r
- rt5621_socdev = socdev;\r
- INIT_DELAYED_WORK(&codec->delayed_work, rt5621_work);\r
- ret = device_create_file(&pdev->dev, &dev_attr_index_reg);\r
- if (ret < 0)\r
- printk(KERN_WARNING "asoc: failed to add index_reg sysfs files\n");\r
-\r
- ret = -ENODEV;\r
-// if (setup->i2c_address) {\r
- codec->hw_write = (hw_write_t)i2c_master_send;\r
- ret = rt5621_add_i2c_device(pdev, setup);\r
-// }\r
- if (ret != 0) {\r
- kfree(codec->private_data);\r
- kfree(codec);\r
- }\r
- return ret;\r
-}\r
-\r
-static int run_delayed_work(struct delayed_work *dwork)\r
-{\r
- int ret;\r
-\r
- /* cancel any work waiting to be queued. */\r
- ret = cancel_delayed_work(dwork);\r
-\r
- /* if there was any work waiting then we run it now and\r
- * wait for it's completion */\r
- if (ret) {\r
- schedule_delayed_work(dwork, 0);\r
- flush_scheduled_work();\r
- }\r
- return ret;\r
-}\r
-\r
-static int rt5621_remove(struct platform_device *pdev)\r
-{\r
- struct snd_soc_device *socdev = platform_get_drvdata(pdev);\r
- struct snd_soc_codec *codec = socdev ->card->codec;\r
-\r
- if (codec->control_data)\r
- rt5621_set_bias_level(codec, SND_SOC_BIAS_OFF);\r
- run_delayed_work(&codec->delayed_work);\r
- snd_soc_free_pcms(socdev);\r
- snd_soc_dapm_free(socdev);\r
- device_remove_file(&pdev->dev, &dev_attr_index_reg);\r
- i2c_unregister_device(codec->control_data);\r
- i2c_del_driver(&rt5621_i2c_driver);\r
- kfree(codec->private_data);\r
- kfree(codec);\r
-\r
- return 0;\r
-}\r
-\r
-struct snd_soc_codec_device soc_codec_dev_rt5621 = {\r
- .probe = rt5621_probe,\r
- .remove = rt5621_remove,\r
- .suspend = rt5621_suspend,\r
- .resume = rt5621_resume,\r
-};\r
-\r
-EXPORT_SYMBOL_GPL(soc_codec_dev_rt5621);\r
-\r
-static int __init rt5621_modinit(void)\r
-{\r
- return snd_soc_register_dai(&rt5621_dai);\r
-}\r
-\r
-static void __exit rt5621_exit(void)\r
-{\r
- snd_soc_unregister_dai(&rt5621_dai);\r
-}\r
-\r
-module_init(rt5621_modinit);\r
-module_exit(rt5621_exit);\r
-MODULE_LICENSE("GPL");\r
-\r
+++ /dev/null
-#ifndef _RT5621_H\r
-#define _RT5621_H\r
-\r
-\r
-#define RT5621_RESET 0X00 //RESET CODEC TO DEFAULT\r
-#define RT5621_SPK_OUT_VOL 0X02 //SPEAKER OUT VOLUME\r
-#define RT5621_HP_OUT_VOL 0X04 //HEADPHONE OUTPUT VOLUME\r
-#define RT5621_MONO_AUX_OUT_VOL 0X06 //MONO OUTPUT/AUXOUT VOLUME\r
-#define RT5621_AUXIN_VOL 0X08 //AUXIN VOLUME\r
-#define RT5621_LINE_IN_VOL 0X0A //LINE IN VOLUME\r
-#define RT5621_STEREO_DAC_VOL 0X0C //STEREO DAC VOLUME\r
-#define RT5621_MIC_VOL 0X0E //MICROPHONE VOLUME\r
-#define RT5621_MIC_ROUTING_CTRL 0X10 //MIC ROUTING CONTROL\r
-#define RT5621_ADC_REC_GAIN 0X12 //ADC RECORD GAIN\r
-#define RT5621_ADC_REC_MIXER 0X14 //ADC RECORD MIXER CONTROL\r
-#define RT5621_SOFT_VOL_CTRL_TIME 0X16 //SOFT VOLUME CONTROL TIME\r
-#define RT5621_OUTPUT_MIXER_CTRL 0X1C //OUTPUT MIXER CONTROL\r
-#define RT5621_MIC_CTRL 0X22 //MICROPHONE CONTROL\r
-#define RT5621_AUDIO_INTERFACE 0X34 //AUDIO INTERFACE\r
-#define RT5621_STEREO_AD_DA_CLK_CTRL 0X36 //STEREO AD/DA CLOCK CONTROL\r
-#define RT5621_COMPANDING_CTRL 0X38 //COMPANDING CONTROL\r
-#define RT5621_PWR_MANAG_ADD1 0X3A //POWER MANAGMENT ADDITION 1\r
-#define RT5621_PWR_MANAG_ADD2 0X3C //POWER MANAGMENT ADDITION 2\r
-#define RT5621_PWR_MANAG_ADD3 0X3E //POWER MANAGMENT ADDITION 3\r
-#define RT5621_ADD_CTRL_REG 0X40 //ADDITIONAL CONTROL REGISTER\r
-#define RT5621_GLOBAL_CLK_CTRL_REG 0X42 //GLOBAL CLOCK CONTROL REGISTER\r
-#define RT5621_PLL_CTRL 0X44 //PLL CONTROL\r
-#define RT5621_GPIO_OUTPUT_PIN_CTRL 0X4A //GPIO OUTPUT PIN CONTROL\r
-#define RT5621_GPIO_PIN_CONFIG 0X4C //GPIO PIN CONFIGURATION\r
-#define RT5621_GPIO_PIN_POLARITY 0X4E //GPIO PIN POLARITY/TYPE \r
-#define RT5621_GPIO_PIN_STICKY 0X50 //GPIO PIN STICKY \r
-#define RT5621_GPIO_PIN_WAKEUP 0X52 //GPIO PIN WAKE UP\r
-#define RT5621_GPIO_PIN_STATUS 0X54 //GPIO PIN STATUS\r
-#define RT5621_GPIO_PIN_SHARING 0X56 //GPIO PIN SHARING\r
-#define RT5621_OVER_TEMP_CURR_STATUS 0X58 //OVER TEMPERATURE AND CURRENT STATUS\r
-#define RT5621_JACK_DET_CTRL 0X5A //JACK DETECT CONTROL REGISTER\r
-#define RT5621_MISC_CTRL 0X5E //MISC CONTROL\r
-#define RT5621_PSEDUEO_SPATIAL_CTRL 0X60 //PSEDUEO STEREO & SPATIAL EFFECT BLOCK CONTROL\r
-#define RT5621_EQ_CTRL 0X62 //EQ CONTROL\r
-#define RT5621_EQ_MODE_ENABLE 0X66 //EQ MODE CHANGE ENABLE\r
-#define RT5621_AVC_CTRL 0X68 //AVC CONTROL\r
-#define RT5621_HID_CTRL_INDEX 0X6A //HIDDEN CONTROL INDEX PORT\r
-#define RT5621_HID_CTRL_DATA 0X6C //HIDDEN CONTROL DATA PORT\r
-#define RT5621_VENDOR_ID1 0x7C //VENDOR ID1\r
-#define RT5621_VENDOR_ID2 0x7E //VENDOR ID2\r
-\r
-\r
-//global definition\r
-#define RT_L_MUTE (0x1<<15) //MUTE LEFT CONTROL BIT\r
-#define RT_L_ZC (0x1<<14) //LEFT ZERO CROSS CONTROL BIT\r
-#define RT_L_SM (0x1<<13) //LEFT SOFTMUTE CONTROL BIT\r
-#define RT_R_MUTE (0x1<<7) //MUTE RIGHT CONTROL BIT\r
-#define RT_R_ZC (0x1<<6) //RIGHT ZERO CROSS CONTROL BIT\r
-#define RT_R_SM (0x1<<5) //RIGHT SOFTMUTE CONTROL BIT\r
-#define RT_M_HP_MIXER (0x1<<15) //Mute source to HP Mixer\r
-#define RT_M_SPK_MIXER (0x1<<14) //Mute source to Speaker Mixer\r
-#define RT_M_MONO_MIXER (0x1<<13) //Mute source to Mono Mixer\r
-#define SPK_CLASS_AB 0\r
-#define SPK_CLASS_D 1\r
-\r
-//Mic Routing Control(0x10)\r
-#define M_MIC1_TO_HP_MIXER (0x1<<15) //Mute MIC1 to HP mixer\r
-#define M_MIC1_TO_SPK_MIXER (0x1<<14) //Mute MiC1 to SPK mixer\r
-#define M_MIC1_TO_MONO_MIXER (0x1<<13) //Mute MIC1 to MONO mixer\r
-#define MIC1_DIFF_INPUT_CTRL (0x1<<12) //MIC1 different input control\r
-#define M_MIC2_TO_HP_MIXER (0x1<<7) //Mute MIC2 to HP mixer\r
-#define M_MIC2_TO_SPK_MIXER (0x1<<6) //Mute MiC2 to SPK mixer\r
-#define M_MIC2_TO_MONO_MIXER (0x1<<5) //Mute MIC2 to MONO mixer\r
-#define MIC2_DIFF_INPUT_CTRL (0x1<<4) //MIC2 different input control\r
-\r
-//ADC Record Gain(0x12)\r
-#define M_ADC_L_TO_HP_MIXER (0x1<<15) //Mute left of ADC to HP Mixer\r
-#define M_ADC_R_TO_HP_MIXER (0x1<<14) //Mute right of ADC to HP Mixer\r
-#define M_ADC_L_TO_MONO_MIXER (0x1<<13) //Mute left of ADC to MONO Mixer\r
-#define M_ADC_R_TO_MONO_MIXER (0x1<<12) //Mute right of ADC to MONO Mixer\r
-#define ADC_L_GAIN_MASK (0x1f<<7) //ADC Record Gain Left channel Mask\r
-#define ADC_L_ZC_DET (0x1<<6) //ADC Zero-Cross Detector Control\r
-#define ADC_R_ZC_DET (0x1<<5) //ADC Zero-Cross Detector Control\r
-#define ADC_R_GAIN_MASK (0x1f<<0) //ADC Record Gain Right channel Mask\r
-\r
-//ADC Input Mixer Control(0x14)\r
-#define M_MIC1_TO_ADC_L_MIXER (0x1<<14) //Mute mic1 to left channel of ADC mixer\r
-#define M_MIC2_TO_ADC_L_MIXER (0x1<<13) //Mute mic2 to left channel of ADC mixer\r
-#define M_LINEIN_L_TO_ADC_L_MIXER (0x1<<12) //Mute line In left channel to left channel of ADC mixer\r
-#define M_AUXIN_L_TO_ADC_L_MIXER (0x1<<11) //Mute aux In left channel to left channel of ADC mixer\r
-#define M_HPMIXER_L_TO_ADC_L_MIXER (0x1<<10) //Mute HP mixer left channel to left channel of ADC mixer\r
-#define M_SPKMIXER_L_TO_ADC_L_MIXER (0x1<<9) //Mute SPK mixer left channel to left channel of ADC mixer\r
-#define M_MONOMIXER_L_TO_ADC_L_MIXER (0x1<<8) //Mute MONO mixer left channel to left channel of ADC mixer\r
-#define M_MIC1_TO_ADC_R_MIXER (0x1<<6) //Mute mic1 to right channel of ADC mixer\r
-#define M_MIC2_TO_ADC_R_MIXER (0x1<<5) //Mute mic2 to right channel of ADC mixer\r
-#define M_LINEIN_R_TO_ADC_R_MIXER (0x1<<4) //Mute lineIn right channel to right channel of ADC mixer\r
-#define M_AUXIN_R_TO_ADC_R_MIXER (0x1<<3) //Mute aux In right channel to right channel of ADC mixer\r
-#define M_HPMIXER_R_TO_ADC_R_MIXER (0x1<<2) //Mute HP mixer right channel to right channel of ADC mixer\r
-#define M_SPKMIXER_R_TO_ADC_R_MIXER (0x1<<1) //Mute SPK mixer right channel to right channel of ADC mixer\r
-#define M_MONOMIXER_R_TO_ADC_R_MIXER (0x1<<0) //Mute MONO mixer right channel to right channel of ADC mixer\r
-\r
-//Output Mixer Control(0x1C)\r
-#define SPKOUT_N_SOUR_MASK (0x3<<14) \r
-#define SPKOUT_N_SOUR_LN (0x2<<14)\r
-#define SPKOUT_N_SOUR_RP (0x1<<14)\r
-#define SPKOUT_N_SOUR_RN (0x0<<14)\r
-#define SPK_OUTPUT_CLASS_AB (0x0<<13)\r
-#define SPK_OUTPUT_CLASS_D (0x1<<13)\r
-#define SPK_CLASS_AB_S_AMP (0x0<<12)\r
-#define SPK_CALSS_AB_W_AMP (0x1<<12)\r
-#define SPKOUT_INPUT_SEL_MASK (0x3<<10)\r
-#define SPKOUT_INPUT_SEL_MONOMIXER (0x3<<10)\r
-#define SPKOUT_INPUT_SEL_SPKMIXER (0x2<<10)\r
-#define SPKOUT_INPUT_SEL_HPMIXER (0x1<<10)\r
-#define SPKOUT_INPUT_SEL_VMID (0x0<<10)\r
-#define HPL_INPUT_SEL_HPLMIXER (0x1<<9)\r
-#define HPR_INPUT_SEL_HPRMIXER (0x1<<8) \r
-#define MONO_AUX_INPUT_SEL_MASK (0x3<<6)\r
-#define MONO_AUX_INPUT_SEL_MONO (0x3<<6)\r
-#define MONO_AUX_INPUT_SEL_SPK (0x2<<6)\r
-#define MONO_AUX_INPUT_SEL_HP (0x1<<6)\r
-#define MONO_AUX_INPUT_SEL_VMID (0x0<<6)\r
-\r
-//Micphone Control define(0x22)\r
-#define MIC1 1\r
-#define MIC2 2\r
-#define MIC_BIAS_90_PRECNET_AVDD 1\r
-#define MIC_BIAS_75_PRECNET_AVDD 2\r
-\r
-#define MIC1_BOOST_CTRL_MASK (0x3<<10)\r
-#define MIC1_BOOST_CTRL_BYPASS (0x0<<10)\r
-#define MIC1_BOOST_CTRL_20DB (0x1<<10)\r
-#define MIC1_BOOST_CTRL_30DB (0x2<<10)\r
-#define MIC1_BOOST_CTRL_40DB (0x3<<10)\r
-\r
-#define MIC2_BOOST_CTRL_MASK (0x3<<8)\r
-#define MIC2_BOOST_CTRL_BYPASS (0x0<<8)\r
-#define MIC2_BOOST_CTRL_20DB (0x1<<8)\r
-#define MIC2_BOOST_CTRL_30DB (0x2<<8)\r
-#define MIC2_BOOST_CTRL_40DB (0x3<<8)\r
-\r
-#define MICBIAS_VOLT_CTRL_MASK (0x1<<5)\r
-#define MICBIAS_VOLT_CTRL_90P (0x0<<5)\r
-#define MICBIAS_VOLT_CTRL_75P (0x1<<5)\r
-\r
-#define MICBIAS_SHORT_CURR_DET_MASK (0x3)\r
-#define MICBIAS_SHORT_CURR_DET_600UA (0x0)\r
-#define MICBIAS_SHORT_CURR_DET_1200UA (0x1)\r
-#define MICBIAS_SHORT_CURR_DET_1800UA (0x2)\r
-\r
-//Audio Interface(0x34) \r
-#define SDP_MASTER_MODE (0x0<<15) //Main I2S interface select Master mode\r
-#define SDP_SLAVE_MODE (0x1<<15) //Main I2S interface select Slave mode\r
-#define I2S_PCM_MODE (0x1<<14) //PCM 0:mode A ,1:mode B \r
-#define MAIN_I2S_BCLK_POL_CTRL (0x1<<7) //0:Normal 1:Invert\r
-#define ADC_DATA_L_R_SWAP (0x1<<5) //0:ADC data appear at left phase of LRCK\r
- //1:ADC data appear at right phase of LRCK\r
-#define DAC_DATA_L_R_SWAP (0x1<<4) //0:DAC data appear at left phase of LRCK\r
- //1:DAC data appear at right phase of LRCK \r
-//Data Length Slection\r
-#define I2S_DL_MASK (0x3<<2) //main i2s Data Length mask \r
-#define I2S_DL_16 (0x0<<2) //16 bits\r
-#define I2S_DL_20 (0x1<<2) //20 bits\r
-#define I2S_DL_24 (0x2<<2) //24 bits\r
-#define I2S_DL_32 (0x3<<2) //32 bits\r
- \r
-//PCM Data Format Selection\r
-#define I2S_DF_MASK (0x3) //main i2s Data Format mask\r
-#define I2S_DF_I2S (0x0) //I2S FORMAT \r
-#define I2S_DF_RIGHT (0x1) //RIGHT JUSTIFIED format\r
-#define I2S_DF_LEFT (0x2) //LEFT JUSTIFIED format\r
-#define I2S_DF_PCM (0x3) //PCM format\r
-\r
-//Stereo AD/DA Clock Control(0x36h)\r
-#define I2S_PRE_DIV_MASK (0x7<<12) \r
-#define I2S_PRE_DIV_1 (0x0<<12) //DIV 1\r
-#define I2S_PRE_DIV_2 (0x1<<12) //DIV 2\r
-#define I2S_PRE_DIV_4 (0x2<<12) //DIV 4\r
-#define I2S_PRE_DIV_8 (0x3<<12) //DIV 8\r
-#define I2S_PRE_DIV_16 (0x4<<12) //DIV 16\r
-#define I2S_PRE_DIV_32 (0x5<<12) //DIV 32\r
-\r
-#define I2S_SCLK_DIV_MASK (0x7<<9) \r
-#define I2S_SCLK_DIV_1 (0x0<<9) //DIV 1\r
-#define I2S_SCLK_DIV_2 (0x1<<9) //DIV 2\r
-#define I2S_SCLK_DIV_3 (0x2<<9) //DIV 3\r
-#define I2S_SCLK_DIV_4 (0x3<<9) //DIV 4\r
-#define I2S_SCLK_DIV_6 (0x4<<9) //DIV 6\r
-#define I2S_SCLK_DIV_8 (0x5<<9) //DIV 8\r
-#define I2S_SCLK_DIV_12 (0x6<<9) //DIV 12\r
-#define I2S_SCLK_DIV_16 (0x7<<9) //DIV 16\r
-\r
-#define I2S_WCLK_DIV_PRE_MASK (0xF<<5) \r
-#define I2S_WCLK_PRE_DIV_1 (0x0<<5) //DIV 1\r
-#define I2S_WCLK_PRE_DIV_2 (0x1<<5) //DIV 2\r
-#define I2S_WCLK_PRE_DIV_3 (0x2<<5) //DIV 3\r
-#define I2S_WCLK_PRE_DIV_4 (0x3<<5) //DIV 4\r
-#define I2S_WCLK_PRE_DIV_5 (0x4<<5) //DIV 5\r
-#define I2S_WCLK_PRE_DIV_6 (0x5<<5) //DIV 6\r
-#define I2S_WCLK_PRE_DIV_7 (0x6<<5) //DIV 7\r
-#define I2S_WCLK_PRE_DIV_8 (0x7<<5) //DIV 8\r
-//........................\r
-\r
-#define I2S_WCLK_DIV_MASK (0x7<<2) \r
-#define I2S_WCLK_DIV_2 (0x0<<2) //DIV 2\r
-#define I2S_WCLK_DIV_4 (0x1<<2) //DIV 4\r
-#define I2S_WCLK_DIV_8 (0x2<<2) //DIV 8\r
-#define I2S_WCLK_DIV_16 (0x3<<2) //DIV 16\r
-#define I2S_WCLK_DIV_32 (0x4<<2) //DIV 32\r
-\r
-#define ADDA_FILTER_CLK_SEL_256FS (0<<1) //256FS\r
-#define ADDA_FILTER_CLK_SEL_384FS (1<<1) //384FS\r
-\r
-#define ADDA_OSR_SEL_64FS (0) //64FS\r
-#define ADDA_OSR_SEL_128FS (1) //128FS\r
-\r
-//Power managment addition 1 (0x3A),0:Disable,1:Enable\r
-#define PWR_MAIN_I2S_EN (0x1<<15)\r
-#define PWR_ZC_DET_PD_EN (0x1<<14) \r
-#define PWR_MIC1_BIAS_EN (0x1<<11)\r
-#define PWR_SHORT_CURR_DET_EN (0x1<<10)\r
-#define PWR_SOFTGEN_EN (0x1<<8)\r
-#define PWR_DEPOP_BUF_HP (0x1<<6)\r
-#define PWR_HP_OUT_AMP (0x1<<5)\r
-#define PWR_HP_OUT_ENH_AMP (0x1<<4)\r
-#define PWR_DEPOP_BUF_AUX (0x1<<2)\r
-#define PWR_AUX_OUT_AMP (0x1<<1)\r
-#define PWR_AUX_OUT_ENH_AMP (0x1)\r
-\r
-\r
-//Power managment addition 2(0x3C),0:Disable,1:Enable\r
-#define PWR_CLASS_AB (0x1<<15)\r
-#define PWR_CLASS_D (0x1<<14)\r
-#define PWR_VREF (0x1<<13)\r
-#define PWR_PLL (0x1<<12)\r
-#define PWR_DAC_REF_CIR (0x1<<10)\r
-#define PWR_L_DAC_CLK (0x1<<9)\r
-#define PWR_R_DAC_CLK (0x1<<8)\r
-#define PWR_L_ADC_CLK_GAIN (0x1<<7)\r
-#define PWR_R_ADC_CLK_GAIN (0x1<<6)\r
-#define PWR_L_HP_MIXER (0x1<<5)\r
-#define PWR_R_HP_MIXER (0x1<<4)\r
-#define PWR_SPK_MIXER (0x1<<3)\r
-#define PWR_MONO_MIXER (0x1<<2)\r
-#define PWR_L_ADC_REC_MIXER (0x1<<1)\r
-#define PWR_R_ADC_REC_MIXER (0x1)\r
-\r
-//Power managment addition 3(0x3E),0:Disable,1:Enable\r
-#define PWR_MAIN_BIAS (0x1<<15)\r
-#define PWR_AUXOUT_L_VOL_AMP (0x1<<14)\r
-#define PWR_AUXOUT_R_VOL_AMP (0x1<<13)\r
-#define PWR_SPK_OUT (0x1<<12)\r
-#define PWR_HP_L_OUT_VOL (0x1<<10)\r
-#define PWR_HP_R_OUT_VOL (0x1<<9)\r
-#define PWR_LINEIN_L_VOL (0x1<<7)\r
-#define PWR_LINEIN_R_VOL (0x1<<6)\r
-#define PWR_AUXIN_L_VOL (0x1<<5)\r
-#define PWR_AUXIN_R_VOL (0x1<<4)\r
-#define PWR_MIC1_FUN_CTRL (0x1<<3)\r
-#define PWR_MIC2_FUN_CTRL (0x1<<2)\r
-#define PWR_MIC1_BOOST_MIXER (0x1<<1)\r
-#define PWR_MIC2_BOOST_MIXER (0x1)\r
-\r
-\r
-//Additional Control Register(0x40)\r
-#define AUXOUT_SEL_DIFF (0x1<<15) //Differential Mode\r
-#define AUXOUT_SEL_SE (0x1<<15) //Single-End Mode\r
-\r
-#define SPK_AB_AMP_CTRL_MASK (0x7<<12)\r
-#define SPK_AB_AMP_CTRL_RATIO_225 (0x0<<12) //2.25 Vdd\r
-#define SPK_AB_AMP_CTRL_RATIO_200 (0x1<<12) //2.00 Vdd\r
-#define SPK_AB_AMP_CTRL_RATIO_175 (0x2<<12) //1.75 Vdd\r
-#define SPK_AB_AMP_CTRL_RATIO_150 (0x3<<12) //1.50 Vdd\r
-#define SPK_AB_AMP_CTRL_RATIO_125 (0x4<<12) //1.25 Vdd \r
-#define SPK_AB_AMP_CTRL_RATIO_100 (0x5<<12) //1.00 Vdd\r
-\r
-#define SPK_D_AMP_CTRL_MASK (0x3<<10)\r
-#define SPK_D_AMP_CTRL_RATIO_175 (0x0<<10) //1.75 Vdd\r
-#define SPK_D_AMP_CTRL_RATIO_150 (0x1<<10) //1.50 Vdd \r
-#define SPK_D_AMP_CTRL_RATIO_125 (0x2<<10) //1.25 Vdd\r
-#define SPK_D_AMP_CTRL_RATIO_100 (0x3<<10) //1.00 Vdd\r
-\r
-#define STEREO_DAC_HI_PASS_FILTER_EN (0x1<<9) //Stereo DAC high pass filter enable\r
-#define STEREO_ADC_HI_PASS_FILTER_EN (0x1<<8) //Stereo ADC high pass filter enable\r
-\r
-#define DIG_VOL_BOOST_MASK (0x3<<4) //Digital volume Boost mask\r
-#define DIG_VOL_BOOST_0DB (0x0<<4) //Digital volume Boost 0DB\r
-#define DIG_VOL_BOOST_6DB (0x1<<4) //Digital volume Boost 6DB\r
-#define DIG_VOL_BOOST_12DB (0x2<<4) //Digital volume Boost 12DB\r
-#define DIG_VOL_BOOST_18DB (0x3<<4) //Digital volume Boost 18DB\r
-\r
-\r
-//Global Clock Control Register(0x42)\r
-#define SYSCLK_SOUR_SEL_MASK (0x1<<15)\r
-#define SYSCLK_SOUR_SEL_MCLK (0x0<<15) //system Clock source from MCLK\r
-#define SYSCLK_SOUR_SEL_PLL (0x1<<15) //system Clock source from PLL\r
-#define PLLCLK_SOUR_SEL_MCLK (0x0<<14) //PLL clock source from MCLK\r
-#define PLLCLK_SOUR_SEL_BITCLK (0x1<<14) //PLL clock source from BITCLK\r
-\r
-#define PLLCLK_DIV_RATIO_MASK (0x3<<1) \r
-#define PLLCLK_DIV_RATIO_DIV1 (0x0<<1) //DIV 1\r
-#define PLLCLK_DIV_RATIO_DIV2 (0x1<<1) //DIV 2\r
-#define PLLCLK_DIV_RATIO_DIV4 (0x2<<1) //DIV 4\r
-#define PLLCLK_DIV_RATIO_DIV8 (0x3<<1) //DIV 8\r
-\r
-#define PLLCLK_PRE_DIV1 (0x0) //DIV 1\r
-#define PLLCLK_PRE_DIV2 (0x1) //DIV 2\r
-\r
-//PLL Control(0x44)\r
-\r
-#define PLL_CTRL_M_VAL(m) ((m)&0xf)\r
-#define PLL_CTRL_K_VAL(k) (((k)&0x7)<<4)\r
-#define PLL_CTRL_N_VAL(n) (((n)&0xff)<<8)\r
-\r
-//GPIO Pin Configuration(0x4C)\r
-#define GPIO_PIN_MASK (0x1<<1)\r
-#define GPIO_PIN_SET_INPUT (0x1<<1)\r
-#define GPIO_PIN_SET_OUTPUT (0x0<<1)\r
-\r
-//Pin Sharing(0x56)\r
-#define LINEIN_L_PIN_SHARING (0x1<<15)\r
-#define LINEIN_L_PIN_AS_LINEIN_L (0x0<<15)\r
-#define LINEIN_L_PIN_AS_JD1 (0x1<<15)\r
-\r
-#define LINEIN_R_PIN_SHARING (0x1<<14)\r
-#define LINEIN_R_PIN_AS_LINEIN_R (0x0<<14)\r
-#define LINEIN_R_PIN_AS_JD2 (0x1<<14)\r
-\r
-#define GPIO_PIN_SHARING (0x3)\r
-#define GPIO_PIN_AS_GPIO (0x0)\r
-#define GPIO_PIN_AS_IRQOUT (0x1)\r
-#define GPIO_PIN_AS_PLLOUT (0x3)\r
-\r
-//Jack Detect Control Register(0x5A)\r
-#define JACK_DETECT_MASK (0x3<<14)\r
-#define JACK_DETECT_USE_JD2 (0x3<<14)\r
-#define JACK_DETECT_USE_JD1 (0x2<<14)\r
-#define JACK_DETECT_USE_GPIO (0x1<<14)\r
-#define JACK_DETECT_OFF (0x0<<14)\r
-\r
-#define SPK_EN_IN_HI (0x1<<11)\r
-#define AUX_R_EN_IN_HI (0x1<<10)\r
-#define AUX_L_EN_IN_HI (0x1<<9)\r
-#define HP_EN_IN_HI (0x1<<8)\r
-#define SPK_EN_IN_LO (0x1<<7)\r
-#define AUX_R_EN_IN_LO (0x1<<6)\r
-#define AUX_L_EN_IN_LO (0x1<<5)\r
-#define HP_EN_IN_LO (0x1<<4)\r
-\r
-////MISC CONTROL(0x5E)\r
-#define DISABLE_FAST_VREG (0x1<<15)\r
-#define SPK_CLASS_AB_OC_PD (0x1<<13)\r
-#define SPK_CLASS_AB_OC_DET (0x1<<12)\r
-#define HP_DEPOP_MODE3_EN (0x1<<10)\r
-#define HP_DEPOP_MODE2_EN (0x1<<9)\r
-#define HP_DEPOP_MODE1_EN (0x1<<8)\r
-#define AUXOUT_DEPOP_MODE3_EN (0x1<<6)\r
-#define AUXOUT_DEPOP_MODE2_EN (0x1<<5)\r
-#define AUXOUT_DEPOP_MODE1_EN (0x1<<4)\r
-#define M_DAC_L_INPUT (0x1<<3)\r
-#define M_DAC_R_INPUT (0x1<<2)\r
-#define IRQOUT_INV_CTRL (0x1<<0)\r
-\r
-//Psedueo Stereo & Spatial Effect Block Control(0x60)\r
-#define SPATIAL_CTRL_EN (0x1<<15)\r
-#define ALL_PASS_FILTER_EN (0x1<<14)\r
-#define PSEUDO_STEREO_EN (0x1<<13)\r
-#define STEREO_EXPENSION_EN (0x1<<12)\r
-\r
-#define GAIN_3D_PARA_L_MASK (0x7<<9)\r
-#define GAIN_3D_PARA_L_1_00 (0x0<<9)\r
-#define GAIN_3D_PARA_L_1_25 (0x1<<9)\r
-#define GAIN_3D_PARA_L_1_50 (0x2<<9)\r
-#define GAIN_3D_PARA_L_1_75 (0x3<<9)\r
-#define GAIN_3D_PARA_L_2_00 (0x4<<9)\r
-\r
-#define GAIN_3D_PARA_R_MASK (0x7<<6)\r
-#define GAIN_3D_PARA_R_1_00 (0x0<<6)\r
-#define GAIN_3D_PARA_R_1_25 (0x1<<6)\r
-#define GAIN_3D_PARA_R_1_50 (0x2<<6)\r
-#define GAIN_3D_PARA_R_1_75 (0x3<<6)\r
-#define GAIN_3D_PARA_R_2_00 (0x4<<6)\r
-\r
-#define RATIO_3D_L_MASK (0x3<<4)\r
-#define RATIO_3D_L_0_0 (0x0<<4)\r
-#define RATIO_3D_L_0_66 (0x1<<4)\r
-#define RATIO_3D_L_1_0 (0x2<<4)\r
-\r
-#define RATIO_3D_R_MASK (0x3<<2)\r
-#define RATIO_3D_R_0_0 (0x0<<2)\r
-#define RATIO_3D_R_0_66 (0x1<<2)\r
-#define RATIO_3D_R_1_0 (0x2<<2)\r
-\r
-#define APF_MASK (0x3)\r
-#define APF_FOR_48K (0x3)\r
-#define APF_FOR_44_1K (0x2)\r
-#define APF_FOR_32K (0x1)\r
-\r
-//EQ CONTROL(0x62)\r
-\r
-#define EN_HW_EQ_BLK (0x1<<15) //HW EQ block control\r
-#define EN_HW_EQ_HPF_MODE (0x1<<14) //High Frequency shelving filter mode\r
-#define EN_HW_EQ_SOUR (0x1<<11) //0:DAC PATH,1:ADC PATH\r
-#define EN_HW_EQ_HPF (0x1<<4) //EQ High Pass Filter Control\r
-#define EN_HW_EQ_BP3 (0x1<<3) //EQ Band-3 Control\r
-#define EN_HW_EQ_BP2 (0x1<<2) //EQ Band-2 Control\r
-#define EN_HW_EQ_BP1 (0x1<<1) //EQ Band-1 Control\r
-#define EN_HW_EQ_LPF (0x1<<0) //EQ Low Pass Filter Control\r
-\r
-//EQ Mode Change Enable(0x66)\r
-#define EQ_HPF_CHANGE_EN (0x1<<4) //EQ High Pass Filter Mode Change Enable\r
-#define EQ_BP3_CHANGE_EN (0x1<<3) //EQ Band-3 Pass Filter Mode Change Enable\r
-#define EQ_BP2_CHANGE_EN (0x1<<2) //EQ Band-2 Pass Filter Mode Change Enable\r
-#define EQ_BP1_CHANGE_EN (0x1<<1) //EQ Band-1 Pass Filter Mode Change Enable\r
-#define EQ_LPF_CHANGE_EN (0x1<<0) //EQ Low Pass Filter Mode Change Enable\r
-\r
-\r
-//AVC Control(0x68)\r
-#define AVC_ENABLE (0x1<<15)\r
-#define AVC_TARTGET_SEL_MASK (0x1<<14)\r
-#define AVC_TARTGET_SEL_R (0x1<<14)\r
-#define AVC_TARTGET_SEL_L (0x0<<14)\r
-\r
-\r
-struct rt5621_setup_data {\r
- unsigned short i2c_address;\r
- unsigned short i2c_bus;\r
-};\r
-\r
-\r
-\r
-#define RT5621_PLL_FR_MCLK 0\r
-#define RT5621_PLL_FR_BCLK 1\r
-\r
-\r
-#define USE_DAPM_CONTROL 0\r
-#define REALTEK_HWDEP 0\r
-\r
-//WaveOut channel for realtek codec\r
-enum \r
-{\r
- RT_WAVOUT_SPK =(0x1<<0),\r
- RT_WAVOUT_SPK_R =(0x1<<1),\r
- RT_WAVOUT_SPK_L =(0x1<<2),\r
- RT_WAVOUT_HP =(0x1<<3),\r
- RT_WAVOUT_HP_R =(0x1<<4),\r
- RT_WAVOUT_HP_L =(0x1<<5), \r
- RT_WAVOUT_MONO =(0x1<<6),\r
- RT_WAVOUT_AUXOUT =(0x1<<7),\r
- RT_WAVOUT_AUXOUT_R =(0x1<<8),\r
- RT_WAVOUT_AUXOUT_L =(0x1<<9),\r
- RT_WAVOUT_LINEOUT =(0x1<<10),\r
- RT_WAVOUT_LINEOUT_R =(0x1<<11),\r
- RT_WAVOUT_LINEOUT_L =(0x1<<12), \r
- RT_WAVOUT_DAC =(0x1<<13), \r
- RT_WAVOUT_ALL_ON =(0x1<<14),\r
-};\r
-\r
-//WaveIn channel for realtek codec\r
-enum\r
-{\r
- RT_WAVIN_R_MONO_MIXER =(0x1<<0),\r
- RT_WAVIN_R_SPK_MIXER =(0x1<<1),\r
- RT_WAVIN_R_HP_MIXER =(0x1<<2),\r
- RT_WAVIN_R_PHONE =(0x1<<3),\r
- RT_WAVIN_R_AUXIN =(0x1<<3), \r
- RT_WAVIN_R_LINE_IN =(0x1<<4),\r
- RT_WAVIN_R_MIC2 =(0x1<<5),\r
- RT_WAVIN_R_MIC1 =(0x1<<6),\r
-\r
- RT_WAVIN_L_MONO_MIXER =(0x1<<8),\r
- RT_WAVIN_L_SPK_MIXER =(0x1<<9),\r
- RT_WAVIN_L_HP_MIXER =(0x1<<10),\r
- RT_WAVIN_L_PHONE =(0x1<<11),\r
- RT_WAVIN_L_AUXIN =(0x1<<11),\r
- RT_WAVIN_L_LINE_IN =(0x1<<12),\r
- RT_WAVIN_L_MIC2 =(0x1<<13),\r
- RT_WAVIN_L_MIC1 =(0x1<<14),\r
-};\r
-\r
-enum \r
-{\r
- POWER_STATE_D0=0,\r
- POWER_STATE_D1,\r
- POWER_STATE_D1_PLAYBACK,\r
- POWER_STATE_D1_RECORD,\r
- POWER_STATE_D2,\r
- POWER_STATE_D2_PLAYBACK,\r
- POWER_STATE_D2_RECORD,\r
- POWER_STATE_D3,\r
- POWER_STATE_D4\r
-\r
-}; \r
-\r
-#if REALTEK_HWDEP\r
-\r
-struct rt56xx_reg_state\r
-{\r
- unsigned int reg_index;\r
- unsigned int reg_value;\r
-};\r
-\r
-struct rt56xx_cmd\r
-{\r
- size_t number;\r
- struct rt56xx_reg_state __user *buf; \r
-};\r
-\r
-enum \r
-{\r
- RT_READ_CODEC_REG_IOCTL = _IOR('R', 0x01, struct rt56xx_cmd),\r
- RT_READ_ALL_CODEC_REG_IOCTL = _IOR('R', 0x02, struct rt56xx_cmd),\r
- RT_WRITE_CODEC_REG_IOCTL = _IOW('R', 0x03, struct rt56xx_cmd),\r
-};\r
-\r
-#endif\r
-\r
-extern struct snd_soc_dai rt5621_dai; \r
-extern struct snd_soc_codec_device soc_codec_dev_rt5621;\r
-\r
-#endif\r
projects / firefly-linux-kernel-4.4.55.git / commitdiff