[ARM] 3417/1: add support for logicpd pxa270 card engine
authorLennert Buytenhek <buytenh@wantstofly.org>
Tue, 28 Mar 2006 20:08:13 +0000 (21:08 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Tue, 28 Mar 2006 20:08:13 +0000 (21:08 +0100)
Patch from Lennert Buytenhek

Add support for the LogicPD PXA270 Card Engine.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-pxa/Kconfig
arch/arm/mach-pxa/Makefile
arch/arm/mach-pxa/lpd270.c [new file with mode: 0644]
include/asm-arm/arch-pxa/irqs.h
include/asm-arm/arch-pxa/lpd270.h [new file with mode: 0644]

index c1d77f5b38234da82e39b8eb7bb558ebdc174f6d..0104fd142e705da2ff6c9298725c675b83729726 100644 (file)
@@ -10,6 +10,11 @@ config ARCH_LUBBOCK
        select PXA25x
        select SA1111
 
+config MACH_LOGICPD_PXA270
+       bool "LogicPD PXA270 Card Engine Development Platform"
+       select PXA27x
+       select IWMMXT
+
 config MACH_MAINSTONE
        bool "Intel HCDDBBVA0 Development Platform"
        select PXA27x
index 382644401a4df47b5691c90810324e3b91ffe42b..4e8a983e2b835c64547d0ab8d895ef5399034c99 100644 (file)
@@ -9,6 +9,7 @@ obj-$(CONFIG_PXA27x) += pxa27x.o
 
 # Specific board support
 obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
+obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
 obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
 obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
 obj-$(CONFIG_PXA_SHARP_C7xx)   += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
new file mode 100644 (file)
index 0000000..ec0f43a
--- /dev/null
@@ -0,0 +1,393 @@
+/*
+ * linux/arch/arm/mach-pxa/lpd270.c
+ *
+ * Support for the LogicPD PXA270 Card Engine.
+ * Derived from the mainstone code, which carries these notices:
+ *
+ * Author:     Nicolas Pitre
+ * Created:    Nov 05, 2002
+ * Copyright:  MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/sysdev.h>
+#include <linux/interrupt.h>
+#include <linux/sched.h>
+#include <linux/bitops.h>
+#include <linux/fb.h>
+#include <linux/ioport.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+
+#include <asm/types.h>
+#include <asm/setup.h>
+#include <asm/memory.h>
+#include <asm/mach-types.h>
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/sizes.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/flash.h>
+
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/lpd270.h>
+#include <asm/arch/audio.h>
+#include <asm/arch/pxafb.h>
+#include <asm/arch/mmc.h>
+#include <asm/arch/irda.h>
+#include <asm/arch/ohci.h>
+
+#include "generic.h"
+
+
+static unsigned int lpd270_irq_enabled;
+
+static void lpd270_mask_irq(unsigned int irq)
+{
+       int lpd270_irq = irq - LPD270_IRQ(0);
+
+       __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
+
+       lpd270_irq_enabled &= ~(1 << lpd270_irq);
+       __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
+}
+
+static void lpd270_unmask_irq(unsigned int irq)
+{
+       int lpd270_irq = irq - LPD270_IRQ(0);
+
+       lpd270_irq_enabled |= 1 << lpd270_irq;
+       __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
+}
+
+static struct irqchip lpd270_irq_chip = {
+       .ack            = lpd270_mask_irq,
+       .mask           = lpd270_mask_irq,
+       .unmask         = lpd270_unmask_irq,
+};
+
+static void lpd270_irq_handler(unsigned int irq, struct irqdesc *desc,
+                                 struct pt_regs *regs)
+{
+       unsigned long pending;
+
+       pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
+       do {
+               GEDR(0) = GPIO_bit(0);  /* clear useless edge notification */
+               if (likely(pending)) {
+                       irq = LPD270_IRQ(0) + __ffs(pending);
+                       desc = irq_desc + irq;
+                       desc_handle_irq(irq, desc, regs);
+
+                       pending = __raw_readw(LPD270_INT_STATUS) &
+                                               lpd270_irq_enabled;
+               }
+       } while (pending);
+}
+
+static void __init lpd270_init_irq(void)
+{
+       int irq;
+
+       pxa_init_irq();
+
+       __raw_writew(0, LPD270_INT_MASK);
+       __raw_writew(0, LPD270_INT_STATUS);
+
+       /* setup extra LogicPD PXA270 irqs */
+       for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
+               set_irq_chip(irq, &lpd270_irq_chip);
+               set_irq_handler(irq, do_level_IRQ);
+               set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+       }
+       set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
+       set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
+}
+
+
+#ifdef CONFIG_PM
+static int lpd270_irq_resume(struct sys_device *dev)
+{
+       __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
+       return 0;
+}
+
+static struct sysdev_class lpd270_irq_sysclass = {
+       set_kset_name("cpld_irq"),
+       .resume = lpd270_irq_resume,
+};
+
+static struct sys_device lpd270_irq_device = {
+       .cls = &lpd270_irq_sysclass,
+};
+
+static int __init lpd270_irq_device_init(void)
+{
+       int ret = sysdev_class_register(&lpd270_irq_sysclass);
+       if (ret == 0)
+               ret = sysdev_register(&lpd270_irq_device);
+       return ret;
+}
+
+device_initcall(lpd270_irq_device_init);
+#endif
+
+
+static struct resource smc91x_resources[] = {
+       [0] = {
+               .start  = LPD270_ETH_PHYS,
+               .end    = (LPD270_ETH_PHYS + 0xfffff),
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = LPD270_ETHERNET_IRQ,
+               .end    = LPD270_ETHERNET_IRQ,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device smc91x_device = {
+       .name           = "smc91x",
+       .id             = 0,
+       .num_resources  = ARRAY_SIZE(smc91x_resources),
+       .resource       = smc91x_resources,
+};
+
+static struct platform_device lpd270_audio_device = {
+       .name           = "pxa2xx-ac97",
+       .id             = -1,
+};
+
+static struct resource lpd270_flash_resources[] = {
+       [0] = {
+               .start  = PXA_CS0_PHYS,
+               .end    = PXA_CS0_PHYS + SZ_64M - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = PXA_CS1_PHYS,
+               .end    = PXA_CS1_PHYS + SZ_64M - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+};
+
+static struct mtd_partition lpd270_flash0_partitions[] = {
+       {
+               .name =         "Bootloader",
+               .size =         0x00040000,
+               .offset =       0,
+               .mask_flags =   MTD_WRITEABLE  /* force read-only */
+       }, {
+               .name =         "Kernel",
+               .size =         0x00400000,
+               .offset =       0x00040000,
+       }, {
+               .name =         "Filesystem",
+               .size =         MTDPART_SIZ_FULL,
+               .offset =       0x00440000
+       },
+};
+
+static struct flash_platform_data lpd270_flash_data[2] = {
+       {
+               .name           = "processor-flash",
+               .map_name       = "cfi_probe",
+               .parts          = lpd270_flash0_partitions,
+               .nr_parts       = ARRAY_SIZE(lpd270_flash0_partitions),
+       }, {
+               .name           = "mainboard-flash",
+               .map_name       = "cfi_probe",
+               .parts          = NULL,
+               .nr_parts       = 0,
+       }
+};
+
+static struct platform_device lpd270_flash_device[2] = {
+       {
+               .name           = "pxa2xx-flash",
+               .id             = 0,
+               .dev = {
+                       .platform_data  = &lpd270_flash_data[0],
+               },
+               .resource       = &lpd270_flash_resources[0],
+               .num_resources  = 1,
+       }, {
+               .name           = "pxa2xx-flash",
+               .id             = 1,
+               .dev = {
+                       .platform_data  = &lpd270_flash_data[1],
+               },
+               .resource       = &lpd270_flash_resources[1],
+               .num_resources  = 1,
+       },
+};
+
+static void lpd270_backlight_power(int on)
+{
+       if (on) {
+               pxa_gpio_mode(GPIO16_PWM0_MD);
+               pxa_set_cken(CKEN0_PWM0, 1);
+               PWM_CTRL0 = 0;
+               PWM_PWDUTY0 = 0x3ff;
+               PWM_PERVAL0 = 0x3ff;
+       } else {
+               PWM_CTRL0 = 0;
+               PWM_PWDUTY0 = 0x0;
+               PWM_PERVAL0 = 0x3FF;
+               pxa_set_cken(CKEN0_PWM0, 0);
+       }
+}
+
+/* 5.7" TFT QVGA (LoLo display number 1) */
+static struct pxafb_mach_info sharp_lq057q3dc02 __initdata = {
+       .pixclock               = 100000,
+       .xres                   = 240,
+       .yres                   = 320,
+       .bpp                    = 16,
+       .hsync_len              = 64,
+       .left_margin            = 0x27,
+       .right_margin           = 0x09,
+       .vsync_len              = 0x04,
+       .upper_margin           = 0x08,
+       .lower_margin           = 0x14,
+       .sync                   = 0,
+       .lccr0                  = 0x07800080,
+       .lccr3                  = 0x04400007,
+       .pxafb_backlight_power  = lpd270_backlight_power,
+};
+
+/* 6.4" TFT VGA (LoLo display number 5) */
+static struct pxafb_mach_info sharp_lq64d343 __initdata = {
+       .pixclock               = 20000,
+       .xres                   = 640,
+       .yres                   = 480,
+       .bpp                    = 16,
+       .hsync_len              = 49,
+       .left_margin            = 0x89,
+       .right_margin           = 0x19,
+       .vsync_len              = 18,
+       .upper_margin           = 0x22,
+       .lower_margin           = 0,
+       .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+       .lccr0                  = 0x07800080,
+       .lccr3                  = 0x04400001,
+       .pxafb_backlight_power  = lpd270_backlight_power,
+};
+
+/* 3.5" TFT QVGA (LoLo display number 8) */
+static struct pxafb_mach_info sharp_lq035q7db02_20 __initdata = {
+       .pixclock               = 100000,
+       .xres                   = 240,
+       .yres                   = 320,
+       .bpp                    = 16,
+       .hsync_len              = 0x34,
+       .left_margin            = 0x09,
+       .right_margin           = 0x09,
+       .vsync_len              = 0x08,
+       .upper_margin           = 0x05,
+       .lower_margin           = 0x14,
+       .sync                   = 0,
+       .lccr0                  = 0x07800080,
+       .lccr3                  = 0x04400007,
+       .pxafb_backlight_power  = lpd270_backlight_power,
+};
+
+static struct platform_device *platform_devices[] __initdata = {
+       &smc91x_device,
+       &lpd270_audio_device,
+       &lpd270_flash_device[0],
+       &lpd270_flash_device[1],
+};
+
+static int lpd270_ohci_init(struct device *dev)
+{
+       /* setup Port1 GPIO pin. */
+       pxa_gpio_mode(88 | GPIO_ALT_FN_1_IN);   /* USBHPWR1 */
+       pxa_gpio_mode(89 | GPIO_ALT_FN_2_OUT);  /* USBHPEN1 */
+
+       /* Set the Power Control Polarity Low and Power Sense
+          Polarity Low to active low. */
+       UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
+               ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
+
+       return 0;
+}
+
+static struct pxaohci_platform_data lpd270_ohci_platform_data = {
+       .port_mode      = PMM_PERPORT_MODE,
+       .init           = lpd270_ohci_init,
+};
+
+static void __init lpd270_init(void)
+{
+       lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
+       lpd270_flash_data[1].width = 4;
+
+       /*
+        * System bus arbiter setting:
+        * - Core_Park
+        * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
+        */
+       ARB_CNTRL = ARB_CORE_PARK | 0x234;
+
+       /*
+        * On LogicPD PXA270, we route AC97_SYSCLK via GPIO45.
+        */
+       pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
+
+       platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
+
+       // set_pxa_fb_info(&sharp_lq057q3dc02);
+       set_pxa_fb_info(&sharp_lq64d343);
+       // set_pxa_fb_info(&sharp_lq035q7db02_20);
+
+       pxa_set_ohci_info(&lpd270_ohci_platform_data);
+}
+
+
+static struct map_desc lpd270_io_desc[] __initdata = {
+       {
+               .virtual        = LPD270_CPLD_VIRT,
+               .pfn            = __phys_to_pfn(LPD270_CPLD_PHYS),
+               .length         = LPD270_CPLD_SIZE,
+               .type           = MT_DEVICE,
+       },
+};
+
+static void __init lpd270_map_io(void)
+{
+       pxa_map_io();
+       iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
+
+       /* initialize sleep mode regs (wake-up sources, etc) */
+       PGSR0 = 0x00008800;
+       PGSR1 = 0x00000002;
+       PGSR2 = 0x0001FC00;
+       PGSR3 = 0x00001F81;
+       PWER  = 0xC0000002;
+       PRER  = 0x00000002;
+       PFER  = 0x00000002;
+
+       /* for use I SRAM as framebuffer.  */
+       PSLR |= 0x00000F04;
+       PCFR  = 0x00000066;
+}
+
+MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
+       /* Maintainer: Peter Barada */
+       .phys_io        = 0x40000000,
+       .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+       .boot_params    = 0xa0000100,
+       .map_io         = lpd270_map_io,
+       .init_irq       = lpd270_init_irq,
+       .timer          = &pxa_timer,
+       .init_machine   = lpd270_init,
+MACHINE_END
index 05c4b70275929e77f880cfa5f4c662aadfc639cc..67af238a8f8ed8cf7165e80ba02b7b01779da553 100644 (file)
 #elif defined(CONFIG_SHARP_LOCOMO)
 #define NR_IRQS                        (IRQ_LOCOMO_SPI_TEND + 1)
 #elif defined(CONFIG_ARCH_LUBBOCK) || \
+      defined(CONFIG_MACH_LOGICPD_PXA270) || \
       defined(CONFIG_MACH_MAINSTONE)
 #define NR_IRQS                        (IRQ_BOARD_END)
 #else
 #define LUBBOCK_USB_DISC_IRQ   LUBBOCK_IRQ(6)  /* usb disconnect */
 #define LUBBOCK_LAST_IRQ       LUBBOCK_IRQ(6)
 
+#define LPD270_IRQ(x)          (IRQ_BOARD_START + (x))
+#define LPD270_USBC_IRQ                LPD270_IRQ(2)
+#define LPD270_ETHERNET_IRQ    LPD270_IRQ(3)
+#define LPD270_AC97_IRQ                LPD270_IRQ(4)
+
 #define MAINSTONE_IRQ(x)       (IRQ_BOARD_START + (x))
 #define MAINSTONE_MMC_IRQ      MAINSTONE_IRQ(0)
 #define MAINSTONE_USIM_IRQ     MAINSTONE_IRQ(1)
diff --git a/include/asm-arm/arch-pxa/lpd270.h b/include/asm-arm/arch-pxa/lpd270.h
new file mode 100644 (file)
index 0000000..501d240
--- /dev/null
@@ -0,0 +1,38 @@
+/*
+ * include/asm-arm/arch-pxa/lpd270.h
+ *
+ * Author:     Lennert Buytenhek
+ * Created:    Feb 10, 2006
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_LPD270_H
+#define __ASM_ARCH_LPD270_H
+
+#define LPD270_CPLD_PHYS       PXA_CS2_PHYS
+#define LPD270_CPLD_VIRT       0xf0000000
+#define LPD270_CPLD_SIZE       0x00100000
+
+#define LPD270_ETH_PHYS                (PXA_CS2_PHYS + 0x01000000)
+
+/* CPLD registers  */
+#define LPD270_CPLD_REG(x)     ((unsigned long)(LPD270_CPLD_VIRT + (x)))
+#define LPD270_CONTROL         LPD270_CPLD_REG(0x00)
+#define LPD270_PERIPHERAL0     LPD270_CPLD_REG(0x04)
+#define LPD270_PERIPHERAL1     LPD270_CPLD_REG(0x08)
+#define LPD270_CPLD_REVISION   LPD270_CPLD_REG(0x14)
+#define LPD270_EEPROM_SPI_ITF  LPD270_CPLD_REG(0x20)
+#define LPD270_MODE_PINS       LPD270_CPLD_REG(0x24)
+#define LPD270_EGPIO           LPD270_CPLD_REG(0x30)
+#define LPD270_INT_MASK                LPD270_CPLD_REG(0x40)
+#define LPD270_INT_STATUS      LPD270_CPLD_REG(0x50)
+
+#define LPD270_INT_AC97                (1 << 4)  /* AC'97 CODEC IRQ */
+#define LPD270_INT_ETHERNET    (1 << 3)  /* Ethernet controller IRQ */
+#define LPD270_INT_USBC                (1 << 2)  /* USB client cable detection IRQ */
+
+
+#endif