Fix PR2620: Fix X86cmppd selection code so it expects operands to be v2f64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54376 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index da1bd93295e082823e6b5b059393b8a48e755927..57ed8b3122dd4daa39124975ef6718fe601ea6ca 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -4770,8 +4770,9 @@ SDValue X86TargetLowering::LowerVSETCC(SDValue Op, SelectionDAG &DAG) {
 
   if (isFP) {
     unsigned SSECC = 8;
-    unsigned Opc = Op0.getValueType() == MVT::v4f32 ? X86ISD::CMPPS :
-                                                      X86ISD::CMPPD;
+    MVT VT0 = Op0.getValueType();
+    assert(VT0 == MVT::v4f32 || VT0 == MVT::v2f64);
+    unsigned Opc = VT0 == MVT::v4f32 ? X86ISD::CMPPS : X86ISD::CMPPD;
     bool Swap = false;
 
     switch (SetCCOpcode) {

diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index 7b5974ff1496b6004b26f3ed8ce7a558371052b4..856525e462a58e770683e53cd1cbc83e6c5db8db 100644 (file)
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -1721,9 +1721,9 @@ let Constraints = "$src1 = $dst" in {
                   [(set VR128:$dst, (int_x86_sse2_cmp_pd VR128:$src1,
                                                  (memop addr:$src), imm:$cc))]>;
 }
-def : Pat<(v2i64 (X86cmppd VR128:$src1, VR128:$src2, imm:$cc)),
+def : Pat<(v2i64 (X86cmppd (v2f64 VR128:$src1), VR128:$src2, imm:$cc)),
           (CMPPDrri VR128:$src1, VR128:$src2, imm:$cc)>;
-def : Pat<(v2i64 (X86cmppd VR128:$src1, (memop addr:$src2), imm:$cc)),
+def : Pat<(v2i64 (X86cmppd (v2f64 VR128:$src1), (memop addr:$src2), imm:$cc)),
           (CMPPDrmi VR128:$src1, addr:$src2, imm:$cc)>;
 
 // Shuffle and unpack instructions

diff --git a/test/CodeGen/X86/vfcmp.ll b/test/CodeGen/X86/vfcmp.ll
new file mode 100644 (file)
index 0000000..85b82a0
--- /dev/null
+++ b/test/CodeGen/X86/vfcmp.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; PR2620
+
+define void @t(i32 %m_task_id, i32 %start_x, i32 %end_x) nounwind {
+       vfcmp olt <2 x double> zeroinitializer, zeroinitializer         ; <<2 x i64>>:1 [#uses=1]
+       extractelement <2 x i64> %1, i32 1              ; <i64>:2 [#uses=1]
+       lshr i64 %2, 63         ; <i64>:3 [#uses=1]
+       trunc i64 %3 to i1              ; <i1>:4 [#uses=1]
+       zext i1 %4 to i8                ; <i8>:5 [#uses=1]
+       insertelement <2 x i8> zeroinitializer, i8 %5, i32 1            ; <<2 x i8>>:6 [#uses=1]
+       store <2 x i8> %6, <2 x i8>* null
+       ret void
+}