rk3066b usb update

diff --git a/drivers/usb/dwc_otg/dwc_otg_cil.c b/drivers/usb/dwc_otg/dwc_otg_cil.c
index 406aad10392897a350d98661a4f666da78345d0b..87c0319494cad3722c72a7e5c2e26bb2b62f51b2 100755 (executable)
--- a/drivers/usb/dwc_otg/dwc_otg_cil.c
+++ b/drivers/usb/dwc_otg/dwc_otg_cil.c
@@ -66,6 +66,7 @@
 #include "dwc_otg_driver.h"
 #include "dwc_otg_cil.h"
 #include "dwc_otg_pcd.h"
+#include "usbdev_rk.h"
 static dwc_otg_core_if_t * dwc_core_if = NULL;
 /** 
  * This function is called to initialize the DWC_otg CSR data
@@ -917,6 +918,8 @@ void dwc_otg_core_host_init(dwc_otg_core_if_t *_core_if)
        dwc_otg_hc_regs_t       *hc_regs;
        int                     num_channels;
        gotgctl_data_t  gotgctl = {.d32 = 0};
+       struct dwc_otg_platform_data *pldata;
+    pldata = _core_if->otg_dev->pldata;
 
        DWC_DEBUGPL(DBG_CILV,"%s(%p)\n", __func__, _core_if);
 
@@ -1018,6 +1021,8 @@ void dwc_otg_core_host_init(dwc_otg_core_if_t *_core_if)
                        hprt0.b.prtpwr = 1;
                        dwc_write_reg32(host_if->hprt0, hprt0.d32);
                }  
+               if(pldata->power_enable)
+                   pldata->power_enable(1);
        }
 
        dwc_otg_enable_host_interrupts( _core_if );

diff --git a/drivers/usb/dwc_otg/dwc_otg_hcd.c b/drivers/usb/dwc_otg/dwc_otg_hcd.c
index bf8cb979e65968388262713a2ea60e3a4d073bf7..1324a86abfa77ee87b25ca430a7af3f97915ce00 100755 (executable)
--- a/drivers/usb/dwc_otg/dwc_otg_hcd.c
+++ b/drivers/usb/dwc_otg/dwc_otg_hcd.c
@@ -858,32 +858,12 @@ int __devinit dwc_otg_hcd_init(struct device *dev)
 }
 
 #ifdef CONFIG_USB11_HOST
-/*
- * suspend: 0 usb phy enable
- *          1 usb phy suspend
- */
-static int32_t host11_phy_suspend_cb( void *_p, int suspend)
-{
-    unsigned int * otg_phy_con1 = (unsigned int*)(USB_GRF_CON);
-    
-    if(suspend) {
-        *otg_phy_con1 &= ~(0x01<<28);
-        DWC_DEBUGPL(DBG_PCDV, "enable usb phy\n");
-    }
-    else
-    {
-        *otg_phy_con1 |= (0x01<<28);
-        DWC_DEBUGPL(DBG_PCDV, "disable usb phy\n");
-    }
-    
-    return suspend;
-}
+
 static dwc_otg_cil_callbacks_t host11_cil_callbacks = {
         .start = dwc_otg_hcd_start_cb,
         .stop = dwc_otg_hcd_stop_cb,
         .disconnect = dwc_otg_hcd_disconnect_cb,
         .session_start = dwc_otg_hcd_session_start_cb,
-        .suspend = host11_phy_suspend_cb,
         .p = 0,//hcd
 };
 
@@ -1363,6 +1343,8 @@ void dwc_otg_hcd_stop(struct usb_hcd *_hcd)
 {
         dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd (_hcd);
        hprt0_data_t hprt0 = { .d32=0 };
+       struct dwc_otg_platform_data *pldata;
+    pldata = dwc_otg_hcd->core_if->otg_dev->pldata;
 
        DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD STOP\n");
 
@@ -1380,6 +1362,8 @@ void dwc_otg_hcd_stop(struct usb_hcd *_hcd)
        hprt0.b.prtpwr = 0;
        dwc_write_reg32(dwc_otg_hcd->core_if->host_if->hprt0, hprt0.d32);
         
+       if(pldata->power_enable)
+           pldata->power_enable(0);
        return;
 }
 

diff --git a/drivers/usb/dwc_otg/dwc_otg_pcd.c b/drivers/usb/dwc_otg/dwc_otg_pcd.c
index 29cbeff1bc7a2b45c25a9e2b6c9d76387fba26a8..cb9a149d95ce5160490452b7bb907d27dc5f97c6 100755 (executable)
--- a/drivers/usb/dwc_otg/dwc_otg_pcd.c
+++ b/drivers/usb/dwc_otg/dwc_otg_pcd.c
@@ -1664,7 +1664,7 @@ static void dwc_phy_reconnect(struct work_struct *work)
         DWC_PRINT("********soft connect!!!*****************************************\n");
     } 
 }
-#if defined(CONFIG_ARCH_RK29) || defined(CONFIG_ARCH_RK3066B)
+#if defined(CONFIG_ARCH_RK29)
 static void dwc_otg_pcd_check_vbus_timer( unsigned long pdata )
 {
     struct device *_dev = (struct device *)pdata;
@@ -1821,106 +1821,6 @@ connect:
     return;
 }
 #endif
-#if 0 //def CONFIG_ARCH_RK30
-int dwc_otg_check_dpdm(void)
-{
-       static uint8_t * reg_base = 0;
-    volatile unsigned int * otg_dctl;
-    volatile unsigned int * otg_gotgctl;
-    volatile unsigned int * otg_hprt0;
-    int bus_status = 0;
-    unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC0_CON2);
-    
-    // softreset & clockgate 
-    *(unsigned int*)(RK30_CRU_BASE+0x120) = ((7<<5)<<16)|(7<<5);    // otg0 phy clkgate
-    udelay(3);
-    *(unsigned int*)(RK30_CRU_BASE+0x120) = ((7<<5)<<16)|(0<<5);    // otg0 phy clkgate
-    dsb();
-    *(unsigned int*)(RK30_CRU_BASE+0xd4) = ((1<<5)<<16);    // otg0 phy clkgate
-    *(unsigned int*)(RK30_CRU_BASE+0xe4) = ((1<<13)<<16);   // otg0 hclk clkgate
-    *(unsigned int*)(RK30_CRU_BASE+0xe0) = ((3<<5)<<16);    // hclk usb clkgate
-    
-    // exit phy suspend 
-        *otg_phy_con1 = ((0x01<<2)<<16);    // exit suspend.
-    
-    // soft connect
-    if(reg_base == 0){
-        reg_base = ioremap(RK30_USBOTG20_PHYS,USBOTG_SIZE);
-        if(!reg_base){
-            bus_status = -1;
-            goto out;
-        }
-    }
-    mdelay(105);
-    printk("regbase %p 0x%x, otg_phy_con%p, 0x%x\n",
-        reg_base, *(reg_base), otg_phy_con1, *otg_phy_con1);
-    otg_dctl = (unsigned int * )(reg_base+0x804);
-    otg_gotgctl = (unsigned int * )(reg_base);
-    otg_hprt0 = (unsigned int * )(reg_base + DWC_OTG_HOST_PORT_REGS_OFFSET);
-    if(*otg_gotgctl &(1<<19)){
-        bus_status = 1;
-        *otg_dctl &= ~2;
-        mdelay(50);    // delay about 10ms
-    // check dp,dm
-        if((*otg_hprt0 & 0xc00)==0xc00)
-            bus_status = 2;
-    }
-out:
-    return bus_status;
-}
-
-EXPORT_SYMBOL(dwc_otg_check_dpdm);
-#endif
-#ifdef CONFIG_ARCH_RK2928
-int dwc_otg_check_dpdm(void)
-{
-       static uint8_t * reg_base = 0;
-    volatile unsigned int * otg_dctl;
-    volatile unsigned int * otg_gotgctl;
-    volatile unsigned int * otg_hprt0;
-    int bus_status = 0;
-    unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC0_CON5);//@lyz modify UOC0_CON2 to CON5
-    
-    // softreset & clockgate //@lyz modify RK2928_CRU_BASE
-    *(unsigned int*)(RK2928_CRU_BASE+0x120) = ((7<<5)<<16)|(7<<5);    // otg0 phy clkgate
-    udelay(3);
-    *(unsigned int*)(RK2928_CRU_BASE+0x120) = ((7<<5)<<16)|(0<<5);    // otg0 phy clkgate
-    dsb();
-    *(unsigned int*)(RK2928_CRU_BASE+0xd4) = ((1<<5)<<16);    // otg0 phy clkgate
-    *(unsigned int*)(RK2928_CRU_BASE+0xe4) = ((1<<13)<<16);   // otg0 hclk clkgate
-    *(unsigned int*)(RK2928_CRU_BASE+0xf4) = ((3<<10)<<16);    // hclk usb clkgate//@lyz to be check
-    
-    // exit phy suspend 
-        *otg_phy_con1 = ((0x01<<0)<<16);    // exit suspend.@lyz
-    
-    // soft connect
-    if(reg_base == 0){
-        reg_base = ioremap(RK2928_USBOTG20_PHYS,USBOTG_SIZE);//@lyz
-        if(!reg_base){
-            bus_status = -1;
-            goto out;
-        }
-    }
-    mdelay(105);
-    printk("regbase %p 0x%x, otg_phy_con%p, 0x%x\n",
-        reg_base, *(reg_base), otg_phy_con1, *otg_phy_con1);
-    otg_dctl = (unsigned int * )(reg_base+0x804);
-    otg_gotgctl = (unsigned int * )(reg_base);
-    otg_hprt0 = (unsigned int * )(reg_base + DWC_OTG_HOST_PORT_REGS_OFFSET);
-    if(*otg_gotgctl &(1<<19)){
-        bus_status = 1;
-        *otg_dctl &= ~(0x01<<1);//@lyz exit soft-disconnect mode
-        mdelay(50);    // delay about 10ms
-    // check dp,dm
-        if((*otg_hprt0 & 0xc00)==0xc00)//@lyz check hprt[11:10] 
-            bus_status = 2;
-    }
-out:
-    return bus_status;
-}
-
-EXPORT_SYMBOL(dwc_otg_check_dpdm);
-#endif
 void dwc_otg_pcd_start_vbus_timer( dwc_otg_pcd_t * _pcd )
 {
         struct timer_list *vbus_timer = &_pcd->check_vbus_timer;

diff --git a/drivers/usb/dwc_otg/usbdev_rk30.c b/drivers/usb/dwc_otg/usbdev_rk30.c
index c4ffc03832d959e819f5072f80d157786cf01184..0d6f0e940984cffa3b5afda5a31b5b46fef4d48e 100755 (executable)
--- a/drivers/usb/dwc_otg/usbdev_rk30.c
+++ b/drivers/usb/dwc_otg/usbdev_rk30.c
@@ -10,6 +10,7 @@
 #include <mach/cru.h>\r
 \r
 #include "usbdev_rk.h"\r
+#include "dwc_otg_regs.h"\r
 #ifdef CONFIG_ARCH_RK30\r
 \r
 #define GRF_REG_BASE   RK30_GRF_BASE   \r
@@ -23,7 +24,55 @@
 #define USBGRF_UOC0_CON2       (GRF_REG_BASE+0x184)\r
 #define USBGRF_UOC1_CON2       (GRF_REG_BASE+0x190)\r
 #endif\r
-//#define USB_IOMUX_INIT(a,b) rk30_mux_api_set(a,b)\r
+\r
+int dwc_otg_check_dpdm(void)\r
+{\r
+       static uint8_t * reg_base = 0;\r
+    volatile unsigned int * otg_dctl;\r
+    volatile unsigned int * otg_gotgctl;\r
+    volatile unsigned int * otg_hprt0;\r
+    int bus_status = 0;\r
+    unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC0_CON2);\r
+    \r
+    // softreset & clockgate \r
+    *(unsigned int*)(RK30_CRU_BASE+0x120) = ((7<<5)<<16)|(7<<5);    // otg0 phy clkgate\r
+    udelay(3);\r
+    *(unsigned int*)(RK30_CRU_BASE+0x120) = ((7<<5)<<16)|(0<<5);    // otg0 phy clkgate\r
+    dsb();\r
+    *(unsigned int*)(RK30_CRU_BASE+0xd4) = ((1<<5)<<16);    // otg0 phy clkgate\r
+    *(unsigned int*)(RK30_CRU_BASE+0xe4) = ((1<<13)<<16);   // otg0 hclk clkgate\r
+    *(unsigned int*)(RK30_CRU_BASE+0xe0) = ((3<<5)<<16);    // hclk usb clkgate\r
+    \r
+    // exit phy suspend \r
+        *otg_phy_con1 = ((0x01<<2)<<16);    // exit suspend.\r
+    \r
+    // soft connect\r
+    if(reg_base == 0){\r
+        reg_base = ioremap(RK30_USBOTG20_PHYS,USBOTG_SIZE);\r
+        if(!reg_base){\r
+            bus_status = -1;\r
+            goto out;\r
+        }\r
+    }\r
+    mdelay(105);\r
+    printk("regbase %p 0x%x, otg_phy_con%p, 0x%x\n",\r
+        reg_base, *(reg_base), otg_phy_con1, *otg_phy_con1);\r
+    otg_dctl = (unsigned int * )(reg_base+0x804);\r
+    otg_gotgctl = (unsigned int * )(reg_base);\r
+    otg_hprt0 = (unsigned int * )(reg_base + DWC_OTG_HOST_PORT_REGS_OFFSET);\r
+    if(*otg_gotgctl &(1<<19)){\r
+        bus_status = 1;\r
+        *otg_dctl &= ~2;\r
+        mdelay(50);    // delay about 10ms\r
+    // check dp,dm\r
+        if((*otg_hprt0 & 0xc00)==0xc00)\r
+            bus_status = 2;\r
+    }\r
+out:\r
+    return bus_status;\r
+}\r
+\r
+EXPORT_SYMBOL(dwc_otg_check_dpdm);\r
 \r
 #ifdef CONFIG_USB20_OTG\r
 /*DWC_OTG*/\r
@@ -114,18 +163,33 @@ int usb20otg_get_status(int id)
     unsigned int usbgrf_status = *(unsigned int*)(USBGRF_SOC_STATUS0);\r
     switch(id)\r
     {\r
-        case 0x01:\r
+#ifdef CONFIG_ARCH_RK3066B\r
+        case USB_STATUS_BVABLID:\r
+            // bvalid in grf\r
+            ret = (usbgrf_status &(1<<10));\r
+            break;\r
+        case USB_STATUS_DPDM:\r
+            // dpdm in grf\r
+            ret = (usbgrf_status &(3<<11));\r
+            break;\r
+        case USB_STATUS_ID:\r
+            // id in grf\r
+            ret = (usbgrf_status &(1<<13));\r
+            break;\r
+#else\r
+        case USB_STATUS_BVABLID:\r
             // bvalid in grf\r
             ret = (usbgrf_status &0x20000);\r
             break;\r
-        case 0x02:\r
+        case USB_STATUS_DPDM:\r
             // dpdm in grf\r
             ret = (usbgrf_status &(3<<18));\r
             break;\r
-        case 0x03:\r
+        case USB_STATUS_ID:\r
             // id in grf\r
             ret = (usbgrf_status &(1<<20));\r
             break;\r
+#endif\r
         default:\r
             break;\r
     }\r
@@ -188,11 +252,11 @@ void usb20host_phy_suspend(void* pdata, int suspend)
     unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC1_CON2);\r
     if(suspend){\r
         *otg_phy_con1 = 0x554|(0xfff<<16);   // enter suspend.\r
-        usbpdata->phy_status = 0;\r
+        usbpdata->phy_status = 1;\r
     }\r
     else{\r
         *otg_phy_con1 = ((0x01<<2)<<16);    // exit suspend.\r
-        usbpdata->phy_status = 1;\r
+        usbpdata->phy_status = 0;\r
     }\r
 }\r
 void usb20host_soft_reset(void)\r
@@ -238,6 +302,20 @@ int usb20host_get_status(int id)
     unsigned int usbgrf_status = *(unsigned int*)(USBGRF_SOC_STATUS0);\r
     switch(id)\r
     {\r
+#ifdef CONFIG_ARCH_RK3066B\r
+        case USB_STATUS_BVABLID:\r
+            // bvalid in grf\r
+            ret = (usbgrf_status &(1<<17));\r
+            break;\r
+        case USB_STATUS_DPDM:\r
+            // dpdm in grf\r
+            ret = (usbgrf_status &(3<<18));\r
+            break;\r
+        case USB_STATUS_ID:\r
+            // id in grf\r
+            ret = (usbgrf_status &(1<<20));\r
+            break;\r
+#else\r
         case USB_STATUS_BVABLID:\r
             // bvalid in grf\r
             ret = (usbgrf_status &(1<<22));\r
@@ -250,6 +328,7 @@ int usb20host_get_status(int id)
             // id in grf\r
             ret = 0;\r
             break;\r
+#endif\r
         default:\r
             break;\r
     }\r
@@ -289,6 +368,7 @@ static int __init usbdev_init_devices(void)
 #ifdef CONFIG_USB20_HOST\r
        platform_device_register(&device_usb20_host);\r
 #endif\r
+    return 0;\r
 }\r
 arch_initcall(usbdev_init_devices);\r
-#endif
\ No newline at end of file
+#endif\r