sky2: avoid pci write posting after disabling irqs
authorLino Sanfilippo <LinoSanfilippo@gmx.de>
Sun, 30 Nov 2014 11:56:51 +0000 (12:56 +0100)
committerDavid S. Miller <davem@davemloft.net>
Sat, 6 Dec 2014 05:33:20 +0000 (21:33 -0800)
In sky2_change_mtu setting B0_IMSK to 0 may be delayed due to PCI write posting
which could result in irqs being still active when synchronize_irq is called.
Since we are not prepared to handle any further irqs after synchronize_irq
(our resources are freed after that) force the write by a consecutive read from
the same register.
Similar situation in sky2_all_down: Here we disabled irqs by a write to B0_IMSK
but did not ensure that this write took place before synchronize_irq. Fix that
too.

Signed-off-by: Lino Sanfilippo <LinoSanfilippo@gmx.de>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/marvell/sky2.c

index bd3366267039bc233e526acf3926d4f8b6fb5638..f14544c8d73f4749ebd4acd0ac70f9b03aba9a87 100644 (file)
@@ -2419,6 +2419,7 @@ static int sky2_change_mtu(struct net_device *dev, int new_mtu)
 
        imask = sky2_read32(hw, B0_IMSK);
        sky2_write32(hw, B0_IMSK, 0);
+       sky2_read32(hw, B0_IMSK);
 
        dev->trans_start = jiffies;     /* prevent tx timeout */
        napi_disable(&hw->napi);
@@ -3487,8 +3488,8 @@ static void sky2_all_down(struct sky2_hw *hw)
        int i;
 
        if (hw->flags & SKY2_HW_IRQ_SETUP) {
-               sky2_read32(hw, B0_IMSK);
                sky2_write32(hw, B0_IMSK, 0);
+               sky2_read32(hw, B0_IMSK);
 
                synchronize_irq(hw->pdev->irq);
                napi_disable(&hw->napi);