pinctrl: tegra: some bits move between registers
authorStephen Warren <swarren@nvidia.com>
Tue, 24 Feb 2015 21:00:49 +0000 (14:00 -0700)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 9 Mar 2015 17:10:58 +0000 (18:10 +0100)
Some of the pinmux configuration bits that exist in "drive group"
registers in Tegra30..Tegra124 move to the "pinmux" registers on future
chips. Add a flag to support this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/pinctrl-tegra.c
drivers/pinctrl/pinctrl-tegra.h
drivers/pinctrl/pinctrl-tegra114.c
drivers/pinctrl/pinctrl-tegra124.c
drivers/pinctrl/pinctrl-tegra20.c
drivers/pinctrl/pinctrl-tegra30.c

index e5949d51bc52c827930e82ebf65b99375d04409b..6cd651a88398776b4b49b7a923779995a1a24f0e 100644 (file)
@@ -348,14 +348,24 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,
                *width = 1;
                break;
        case TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE:
-               *bank = g->drv_bank;
-               *reg = g->drv_reg;
+               if (pmx->soc->hsm_in_mux) {
+                       *bank = g->mux_bank;
+                       *reg = g->mux_reg;
+               } else {
+                       *bank = g->drv_bank;
+                       *reg = g->drv_reg;
+               }
                *bit = g->hsm_bit;
                *width = 1;
                break;
        case TEGRA_PINCONF_PARAM_SCHMITT:
-               *bank = g->drv_bank;
-               *reg = g->drv_reg;
+               if (pmx->soc->schmitt_in_mux) {
+                       *bank = g->mux_bank;
+                       *reg = g->mux_reg;
+               } else {
+                       *bank = g->drv_bank;
+                       *reg = g->drv_reg;
+               }
                *bit = g->schmitt_bit;
                *width = 1;
                break;
@@ -390,8 +400,13 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,
                *width = g->slwr_width;
                break;
        case TEGRA_PINCONF_PARAM_DRIVE_TYPE:
-               *bank = g->drv_bank;
-               *reg = g->drv_reg;
+               if (pmx->soc->drvtype_in_mux) {
+                       *bank = g->mux_bank;
+                       *reg = g->mux_reg;
+               } else {
+                       *bank = g->drv_bank;
+                       *reg = g->drv_reg;
+               }
                *bit = g->drvtype_bit;
                *width = 2;
                break;
index 8d94d1332e7b48a5f5d534a29829f7d0ce868048..d54ab9d387924b272803e20da79490d4fede431d 100644 (file)
@@ -182,6 +182,9 @@ struct tegra_pinctrl_soc_data {
        unsigned nfunctions;
        const struct tegra_pingroup *groups;
        unsigned ngroups;
+       bool hsm_in_mux;
+       bool schmitt_in_mux;
+       bool drvtype_in_mux;
 };
 
 int tegra_pinctrl_probe(struct platform_device *pdev,
index 0740cdba75085ce30d4488ed1d14ade502f5ece8..05e49d5137ab358e7f5175bc97b9c0316762c55f 100644 (file)
@@ -1841,6 +1841,9 @@ static const struct tegra_pinctrl_soc_data tegra114_pinctrl = {
        .nfunctions = ARRAY_SIZE(tegra114_functions),
        .groups = tegra114_groups,
        .ngroups = ARRAY_SIZE(tegra114_groups),
+       .hsm_in_mux = false,
+       .schmitt_in_mux = false,
+       .drvtype_in_mux = false,
 };
 
 static int tegra114_pinctrl_probe(struct platform_device *pdev)
index b7ba26064dbf1c4afddcf9fcd1074b33aac245b7..7cd44c7c296daa75ef2400542b14a83480b98303 100644 (file)
@@ -2053,6 +2053,9 @@ static const struct tegra_pinctrl_soc_data tegra124_pinctrl = {
        .nfunctions = ARRAY_SIZE(tegra124_functions),
        .groups = tegra124_groups,
        .ngroups = ARRAY_SIZE(tegra124_groups),
+       .hsm_in_mux = false,
+       .schmitt_in_mux = false,
+       .drvtype_in_mux = false,
 };
 
 static int tegra124_pinctrl_probe(struct platform_device *pdev)
index d3a5722e4acbde4318d3b8f9501214dfe8cbdbb1..4833db4433d948c757bc6f5336bfde89fdd1d6e1 100644 (file)
@@ -2221,6 +2221,9 @@ static const struct tegra_pinctrl_soc_data tegra20_pinctrl = {
        .nfunctions = ARRAY_SIZE(tegra20_functions),
        .groups = tegra20_groups,
        .ngroups = ARRAY_SIZE(tegra20_groups),
+       .hsm_in_mux = false,
+       .schmitt_in_mux = false,
+       .drvtype_in_mux = false,
 };
 
 static int tegra20_pinctrl_probe(struct platform_device *pdev)
index 77c0768d5bd874c6e9c44ff73a71c9713ad64f4d..47b2fd8bb2e9daba9b0209869fc211add86997fc 100644 (file)
@@ -2476,6 +2476,9 @@ static const struct tegra_pinctrl_soc_data tegra30_pinctrl = {
        .nfunctions = ARRAY_SIZE(tegra30_functions),
        .groups = tegra30_groups,
        .ngroups = ARRAY_SIZE(tegra30_groups),
+       .hsm_in_mux = false,
+       .schmitt_in_mux = false,
+       .drvtype_in_mux = false,
 };
 
 static int tegra30_pinctrl_probe(struct platform_device *pdev)