rk31: add rga support
authorhxy <hxy@rock-chips.com>
Tue, 31 Jul 2012 09:34:50 +0000 (17:34 +0800)
committerhxy <hxy@rock-chips.com>
Tue, 31 Jul 2012 09:35:16 +0000 (17:35 +0800)
arch/arm/configs/rk31_fpga_defconfig
drivers/video/rockchip/rga/Kconfig
drivers/video/rockchip/rga/rga.h
drivers/video/rockchip/rga/rga_drv.c

index 49213e435eae925569bb0c69842de27bd40d514a..d6e2dafed4f6e1c01ed150a14863ead072fd898e 100644 (file)
@@ -95,6 +95,7 @@ CONFIG_FB_ROCKCHIP=y
 CONFIG_LCDC_RK31=y
 CONFIG_LCDC1_RK31=y
 # CONFIG_THREE_FB_BUFFER is not set
+CONFIG_RGA_RK30=y
 CONFIG_LOGO=y
 # CONFIG_LOGO_LINUX_MONO is not set
 # CONFIG_LOGO_LINUX_VGA16 is not set
index 152e2bd55ef023c6c2b14057f213c11df5efa386..305130cac236b75492a73d5d417930bab1796d1c 100755 (executable)
@@ -1,8 +1,8 @@
 menu "RGA"
-       depends on ARCH_RK30 || ARCH_RK2928
+       depends on ARCH_RK30 || ARCH_RK2928 || ARCH_RK31
 
 config RGA_RK30
-       tristate "ROCKCHIP RK30 || RK2928 RGA"
+       tristate "ROCKCHIP RK30 || RK2928 RGA || RK31 RGA "
        help
          rk30 rga module.
 
index bbf5fa94833deb0a7f57ca3096dc6273a68fbb5b..2623d6dd1e9bfb61c672783883d2db7844b9de09 100755 (executable)
@@ -390,6 +390,8 @@ typedef struct rga_service_info {
 #define RGA_BASE                 0x1010c000\r
 #elif defined(CONFIG_ARCH_RK30)\r
 #define RGA_BASE                 0x10114000\r
+#elif defined(CONFIG_ARCH_RK31)\r
+#define RGA_BASE                 0x10114000\r
 #endif\r
 \r
 //General Registers\r
index 149769b85c1b1a37f17d841ad4558a78b53f78c2..65f17f4e412e1fe8f23b95a3826a560685dc9505 100755 (executable)
@@ -60,7 +60,7 @@
 \r
 #define RGA_MAJOR              255\r
 \r
-#if 0\r
+#if 1\r
 #if CONFIG_ARCH_RK2928\r
 #define RK30_RGA_PHYS  0x1010C000\r
 #define RK30_RGA_SIZE  SZ_8K\r
 #define RK30_RGA_PHYS  0x10114000\r
 #define RK30_RGA_SIZE  SZ_8K\r
 #define RGA_RESET_TIMEOUT      1000\r
+#elif CONFIG_ARCH_RK31\r
+#define RK30_RGA_PHYS  0x10114000\r
+#define RK30_RGA_SIZE  SZ_8K\r
+#define RGA_RESET_TIMEOUT      1000\r
 #endif\r
 #endif\r
 \r
@@ -132,7 +136,7 @@ static inline u32 rga_read(u32 r)
        return __raw_readl(drvdata->rga_base + r);\r
 }\r
 \r
-#if defined(CONFIG_ARCH_RK30)\r
+#if defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK31)\r
 static void rga_soft_reset(void)\r
 {\r
        u32 i;\r
@@ -583,6 +587,8 @@ static void rga_try_set_reg(void)
 \r
             #if defined(CONFIG_ARCH_RK30)\r
             rga_soft_reset();\r
+            #elif defined(CONFIG_ARCH_RK31)\r
+            rga_soft_reset();\r
             #endif\r
             \r
             rga_write(0, RGA_MMU_CTRL);\r
@@ -1114,6 +1120,8 @@ static int __devinit rga_drv_probe(struct platform_device *pdev)
        if (!request_mem_region(RK2928_RGA_PHYS, RK2928_RGA_SIZE, "rga_io"))\r
     #elif defined(CONFIG_ARCH_RK30)\r
     if (!request_mem_region(RK30_RGA_PHYS, RK30_RGA_SIZE, "rga_io"))\r
+    #elif defined(CONFIG_ARCH_RK31)\r
+    if (!request_mem_region(RK30_RGA_PHYS, RK30_RGA_SIZE, "rga_io"))\r
     #endif    \r
        {\r
                pr_info("failed to reserve rga HW regs\n");\r
@@ -1124,6 +1132,8 @@ static int __devinit rga_drv_probe(struct platform_device *pdev)
        data->rga_base = (void*)ioremap_nocache(RK2928_RGA_PHYS, RK2928_RGA_SIZE);\r
     #elif defined(CONFIG_ARCH_RK30)\r
     data->rga_base = (void*)ioremap_nocache(RK30_RGA_PHYS, RK30_RGA_SIZE);\r
+    #elif defined(CONFIG_ARCH_RK31)\r
+    data->rga_base = (void*)ioremap_nocache(RK30_RGA_PHYS, RK30_RGA_SIZE);\r
     #endif\r
        if (data->rga_base == NULL)\r
        {\r
@@ -1242,7 +1252,7 @@ static int __init rga_init(void)
                        return ret;\r
        }\r
 \r
-    //rga_test_0();\r
+   // rga_test_0();\r
 \r
        INFO("Module initialized.\n");\r
 \r
@@ -1309,10 +1319,10 @@ void rga_test_0(void)
     src = src_buf;\r
     dst = dst_buf;\r
 \r
-    //memset(src_buf, 0x80, 1920*1080*4);\r
+    memset(src_buf, 0xff, 1920*1080*4);\r
 \r
-    //dmac_flush_range(&src_buf[0], &src_buf[1920*1080]);\r
-    //outer_flush_range(virt_to_phys(&src_buf[0]),virt_to_phys(&src_buf[1024*1024]));\r
+    dmac_flush_range(&src_buf[0], &src_buf[1920*1080]);\r
+    outer_flush_range(virt_to_phys(&src_buf[0]),virt_to_phys(&src_buf[1024*1024]));\r
 \r
     #if 0\r
     memset(src_buf, 0x80, 800*480*4);\r
@@ -1322,21 +1332,21 @@ void rga_test_0(void)
     outer_flush_range(virt_to_phys(&dst_buf[0]),virt_to_phys(&dst_buf[800*480]));\r
     #endif\r
 \r
-    req.src.act_w = 1280;\r
-    req.src.act_h = 800;\r
+    req.src.act_w = 320;\r
+    req.src.act_h = 240;\r
 \r
-    req.src.vir_w = 1280;\r
-    req.src.vir_h = 800;\r
+    req.src.vir_w = 320;\r
+    req.src.vir_h = 240;\r
     req.src.yrgb_addr = (uint32_t)virt_to_phys(src);\r
     req.src.uv_addr = (uint32_t)virt_to_phys(src);\r
     req.src.v_addr = (uint32_t)virt_to_phys(src);\r
     req.src.format = 0;\r
 \r
-    req.dst.act_w = 1280;\r
-    req.dst.act_h = 800;\r
+    req.dst.act_w = 320;\r
+    req.dst.act_h = 240;\r
 \r
-    req.dst.vir_w = 1280;\r
-    req.dst.vir_h = 800;\r
+    req.dst.vir_w = 800;\r
+    req.dst.vir_h = 480;\r
     req.dst.x_offset = 0;\r
     req.dst.y_offset = 0;\r
     req.dst.yrgb_addr = (uint32_t)virt_to_phys(dst);\r
@@ -1344,58 +1354,15 @@ void rga_test_0(void)
     //req.dst.format = RK_FORMAT_RGB_565;\r
 \r
     req.clip.xmin = 0;\r
-    req.clip.xmax = 1279;\r
+    req.clip.xmax = 799;\r
     req.clip.ymin = 0;\r
-    req.clip.ymax = 799;\r
+    req.clip.ymax = 479;\r
 \r
     //req.render_mode = color_fill_mode;\r
     //req.fg_color = 0x80ffffff;\r
 \r
-    req.rotate_mode = 1;\r
-    req.scale_mode = 2;\r
-\r
-    //req.alpha_rop_flag = 0;\r
-    //req.alpha_rop_mode = 0x1;\r
-\r
-    req.sina = 0;\r
-    req.cosa = 65536;\r
-\r
-    req.mmu_info.mmu_flag = 0x21;\r
-    req.mmu_info.mmu_en = 1;\r
-\r
-    rga_blit_sync(&session, &req);\r
-\r
-    req.src.act_w = 1280;\r
-    req.src.act_h = 800;\r
-\r
-    req.src.vir_w = 1280;\r
-    req.src.vir_h = 800;\r
-    req.src.yrgb_addr = (uint32_t)virt_to_phys(src);\r
-    req.src.uv_addr = (uint32_t)virt_to_phys(src);\r
-    req.src.v_addr = (uint32_t)virt_to_phys(src);\r
-    req.src.format = RK_FORMAT_YCbCr_420_SP;\r
-\r
-    req.dst.act_w = 1280;\r
-    req.dst.act_h = 800;\r
-\r
-    req.dst.vir_w = 1280;\r
-    req.dst.vir_h = 800;\r
-    req.dst.x_offset = 0;\r
-    req.dst.y_offset = 0;\r
-    req.dst.yrgb_addr = (uint32_t)virt_to_phys(dst);\r
-\r
-    //req.dst.format = RK_FORMAT_RGB_565;\r
-\r
-    req.clip.xmin = 0;\r
-    req.clip.xmax = 1279;\r
-    req.clip.ymin = 0;\r
-    req.clip.ymax = 799;\r
-\r
-    //req.render_mode = color_fill_mode;\r
-    //req.fg_color = 0x80ffffff;\r
-\r
-    req.rotate_mode = 1;\r
-    req.scale_mode = 2;\r
+    //req.rotate_mode = 1;\r
+    //req.scale_mode = 2;\r
 \r
     //req.alpha_rop_flag = 0;\r
     //req.alpha_rop_mode = 0x1;\r
@@ -1408,11 +1375,11 @@ void rga_test_0(void)
 \r
     rga_blit_sync(&session, &req);\r
 \r
-    #if 0\r
+    #if 1\r
     fb->var.bits_per_pixel = 32;\r
     \r
-    fb->var.xres = 1280;\r
-    fb->var.yres = 800;\r
+    fb->var.xres = 800;\r
+    fb->var.yres = 480;\r
 \r
     fb->var.red.length = 8;\r
     fb->var.red.offset = 0;\r