\r
#define RGA_MAJOR 255\r
\r
-#if 0\r
+#if 1\r
#if CONFIG_ARCH_RK2928\r
#define RK30_RGA_PHYS 0x1010C000\r
#define RK30_RGA_SIZE SZ_8K\r
#define RK30_RGA_PHYS 0x10114000\r
#define RK30_RGA_SIZE SZ_8K\r
#define RGA_RESET_TIMEOUT 1000\r
+#elif CONFIG_ARCH_RK31\r
+#define RK30_RGA_PHYS 0x10114000\r
+#define RK30_RGA_SIZE SZ_8K\r
+#define RGA_RESET_TIMEOUT 1000\r
#endif\r
#endif\r
\r
return __raw_readl(drvdata->rga_base + r);\r
}\r
\r
-#if defined(CONFIG_ARCH_RK30)\r
+#if defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK31)\r
static void rga_soft_reset(void)\r
{\r
u32 i;\r
\r
#if defined(CONFIG_ARCH_RK30)\r
rga_soft_reset();\r
+ #elif defined(CONFIG_ARCH_RK31)\r
+ rga_soft_reset();\r
#endif\r
\r
rga_write(0, RGA_MMU_CTRL);\r
if (!request_mem_region(RK2928_RGA_PHYS, RK2928_RGA_SIZE, "rga_io"))\r
#elif defined(CONFIG_ARCH_RK30)\r
if (!request_mem_region(RK30_RGA_PHYS, RK30_RGA_SIZE, "rga_io"))\r
+ #elif defined(CONFIG_ARCH_RK31)\r
+ if (!request_mem_region(RK30_RGA_PHYS, RK30_RGA_SIZE, "rga_io"))\r
#endif \r
{\r
pr_info("failed to reserve rga HW regs\n");\r
data->rga_base = (void*)ioremap_nocache(RK2928_RGA_PHYS, RK2928_RGA_SIZE);\r
#elif defined(CONFIG_ARCH_RK30)\r
data->rga_base = (void*)ioremap_nocache(RK30_RGA_PHYS, RK30_RGA_SIZE);\r
+ #elif defined(CONFIG_ARCH_RK31)\r
+ data->rga_base = (void*)ioremap_nocache(RK30_RGA_PHYS, RK30_RGA_SIZE);\r
#endif\r
if (data->rga_base == NULL)\r
{\r
return ret;\r
}\r
\r
- //rga_test_0();\r
+ // rga_test_0();\r
\r
INFO("Module initialized.\n");\r
\r
src = src_buf;\r
dst = dst_buf;\r
\r
- //memset(src_buf, 0x80, 1920*1080*4);\r
+ memset(src_buf, 0xff, 1920*1080*4);\r
\r
- //dmac_flush_range(&src_buf[0], &src_buf[1920*1080]);\r
- //outer_flush_range(virt_to_phys(&src_buf[0]),virt_to_phys(&src_buf[1024*1024]));\r
+ dmac_flush_range(&src_buf[0], &src_buf[1920*1080]);\r
+ outer_flush_range(virt_to_phys(&src_buf[0]),virt_to_phys(&src_buf[1024*1024]));\r
\r
#if 0\r
memset(src_buf, 0x80, 800*480*4);\r
outer_flush_range(virt_to_phys(&dst_buf[0]),virt_to_phys(&dst_buf[800*480]));\r
#endif\r
\r
- req.src.act_w = 1280;\r
- req.src.act_h = 800;\r
+ req.src.act_w = 320;\r
+ req.src.act_h = 240;\r
\r
- req.src.vir_w = 1280;\r
- req.src.vir_h = 800;\r
+ req.src.vir_w = 320;\r
+ req.src.vir_h = 240;\r
req.src.yrgb_addr = (uint32_t)virt_to_phys(src);\r
req.src.uv_addr = (uint32_t)virt_to_phys(src);\r
req.src.v_addr = (uint32_t)virt_to_phys(src);\r
req.src.format = 0;\r
\r
- req.dst.act_w = 1280;\r
- req.dst.act_h = 800;\r
+ req.dst.act_w = 320;\r
+ req.dst.act_h = 240;\r
\r
- req.dst.vir_w = 1280;\r
- req.dst.vir_h = 800;\r
+ req.dst.vir_w = 800;\r
+ req.dst.vir_h = 480;\r
req.dst.x_offset = 0;\r
req.dst.y_offset = 0;\r
req.dst.yrgb_addr = (uint32_t)virt_to_phys(dst);\r
//req.dst.format = RK_FORMAT_RGB_565;\r
\r
req.clip.xmin = 0;\r
- req.clip.xmax = 1279;\r
+ req.clip.xmax = 799;\r
req.clip.ymin = 0;\r
- req.clip.ymax = 799;\r
+ req.clip.ymax = 479;\r
\r
//req.render_mode = color_fill_mode;\r
//req.fg_color = 0x80ffffff;\r
\r
- req.rotate_mode = 1;\r
- req.scale_mode = 2;\r
-\r
- //req.alpha_rop_flag = 0;\r
- //req.alpha_rop_mode = 0x1;\r
-\r
- req.sina = 0;\r
- req.cosa = 65536;\r
-\r
- req.mmu_info.mmu_flag = 0x21;\r
- req.mmu_info.mmu_en = 1;\r
-\r
- rga_blit_sync(&session, &req);\r
-\r
- req.src.act_w = 1280;\r
- req.src.act_h = 800;\r
-\r
- req.src.vir_w = 1280;\r
- req.src.vir_h = 800;\r
- req.src.yrgb_addr = (uint32_t)virt_to_phys(src);\r
- req.src.uv_addr = (uint32_t)virt_to_phys(src);\r
- req.src.v_addr = (uint32_t)virt_to_phys(src);\r
- req.src.format = RK_FORMAT_YCbCr_420_SP;\r
-\r
- req.dst.act_w = 1280;\r
- req.dst.act_h = 800;\r
-\r
- req.dst.vir_w = 1280;\r
- req.dst.vir_h = 800;\r
- req.dst.x_offset = 0;\r
- req.dst.y_offset = 0;\r
- req.dst.yrgb_addr = (uint32_t)virt_to_phys(dst);\r
-\r
- //req.dst.format = RK_FORMAT_RGB_565;\r
-\r
- req.clip.xmin = 0;\r
- req.clip.xmax = 1279;\r
- req.clip.ymin = 0;\r
- req.clip.ymax = 799;\r
-\r
- //req.render_mode = color_fill_mode;\r
- //req.fg_color = 0x80ffffff;\r
-\r
- req.rotate_mode = 1;\r
- req.scale_mode = 2;\r
+ //req.rotate_mode = 1;\r
+ //req.scale_mode = 2;\r
\r
//req.alpha_rop_flag = 0;\r
//req.alpha_rop_mode = 0x1;\r
\r
rga_blit_sync(&session, &req);\r
\r
- #if 0\r
+ #if 1\r
fb->var.bits_per_pixel = 32;\r
\r
- fb->var.xres = 1280;\r
- fb->var.yres = 800;\r
+ fb->var.xres = 800;\r
+ fb->var.yres = 480;\r
\r
fb->var.red.length = 8;\r
fb->var.red.offset = 0;\r