rk3188: auto calc delayline boundary

diff --git a/arch/arm/mach-rk3188/dvfs.c b/arch/arm/mach-rk3188/dvfs.c
index 772af60ae6f998c56474f15c0d447248f9745fef..0aab82f67808c5f9c97848e91f43c1e267a9e52c 100755 (executable)
--- a/arch/arm/mach-rk3188/dvfs.c
+++ b/arch/arm/mach-rk3188/dvfs.c
@@ -89,6 +89,9 @@ static struct lkg_maxvolt lkg_volt_table[] = {
 };\r
 \r
 static int leakage_level = 0;\r
+#define MHZ    (1000 * 1000)\r
+#define KHZ    (1000)\r
+// Delayline bound for nandc = 148.5MHz, Varm = Vlog = 1.00V\r
 #define HIGH_DELAYLINE 125\r
 #define LOW_DELAYLINE  110\r
 static u8 rk30_get_avs_val(void);\r
@@ -100,16 +103,33 @@ void dvfs_adjust_table_lmtvolt(struct clk *clk, struct cpufreq_frequency_table *
        leakage_level = rk_leakage_val();\r
        printk("DVFS MSG: %s: %s get leakage_level = %d\n", clk->name, __func__, leakage_level);\r
        if (leakage_level == 0) {\r
-               int delayline_val = 0;\r
+               \r
+               /*\r
+                * This is for delayline auto scale voltage, \r
+                * FIXME: HIGH_DELAYLINE / LOW_DELAYLINE value maybe redefined under\r
+                * Varm = Vlog = 1.00V.\r
+                * Warning: this value is frequency/voltage sensitive, care\r
+                * about Freq nandc/Volt log.\r
+                *\r
+                */\r
+\r
+               unsigned long delayline_val = 0;\r
+               unsigned long high_delayline = 0, low_delayline = 0;\r
+               unsigned long rate_nandc = 0;\r
+               rate_nandc = clk_get_rate(clk_get(NULL, "nandc")) / KHZ;\r
+               printk("Get nandc rate = %lu KHz\n", rate_nandc);\r
+               high_delayline = HIGH_DELAYLINE * 148500 / rate_nandc;\r
+               low_delayline = LOW_DELAYLINE * 148500 / rate_nandc;\r
                delayline_val = rk30_get_avs_val();\r
-               printk("This chip no leakage msg, use delayline instead, val = %d\n", delayline_val);\r
+               printk("This chip no leakage msg, use delayline instead, val = %lu.(HDL=%lu, LDL=%lu)\n",\r
+                               delayline_val, high_delayline, low_delayline);\r
 \r
-               if (delayline_val >= HIGH_DELAYLINE) {\r
+               if (delayline_val >= high_delayline) {\r
                        leakage_level = 4;      //same as leakage_level > 4\r
 \r
-               } else if (delayline_val <= LOW_DELAYLINE) {\r
+               } else if (delayline_val <= low_delayline) {\r
                        leakage_level = 1;\r
-                       printk("Delayline TOO LOW, maybe need high voltage\n");\r
+                       printk("Delayline TOO LOW, high voltage request\n");\r
 \r
                } else\r
                        leakage_level = 2;      //same as leakage_level = 3\r