status = "disabled";
};
+ gpu: gpu@0x20001000 {
+ compatible = "arm,mali400";
+ reg = <0x20001000 0x200>,
+ <0x20000000 0x100>,
+ <0x20003000 0x100>,
+ <0x20008000 0x1100>,
+ <0x20004000 0x100>,
+ <0x2000A000 0x1100>,
+ <0x20005000 0x100>;
+
+ reg-names = "Mali_L2",
+ "Mali_GP",
+ "Mali_GP_MMU",
+ "Mali_PP0",
+ "Mali_PP0_MMU",
+ "Mali_PP1",
+ "Mali_PP1_MMU";
+
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+
+ interrupt-names = "Mali_GP_IRQ",
+ "Mali_GP_MMU_IRQ",
+ "Mali_PP0_IRQ",
+ "Mali_PP0_MMU_IRQ",
+ "Mali_PP1_IRQ",
+ "Mali_PP1_MMU_IRQ";
+ clocks = <&cru ACLK_GPU>;
+ clock-names = "clk_mali";
+ operating-points-v2 = <&gpu_opp_table>;
+ status = "disabled";
+ };
+
+ gpu_opp_table: opp-table2 {
+ compatible = "operating-points-v2";
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <1050000>;
+ };
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <1050000>;
+ };
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <1150000>;
+ };
+ };
+
vop: vop@20050000 {
compatible = "rockchip,rk322x-vop";
reg = <0x20050000 0x1ffc>, <0x20052000 0x1000>;