ARM: cci driver need big endian fixes in asm code

cci_enable_port_for_self written in asm and it works with h/w
registers that are in little endian format. When run in big
endian mode it needs byteswaped constants before/after it
writes/reads to/from such registers

Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
(cherry picked from commit fdb07aee0b2b9d7d1893c97f5ce79ec355caaf1f)

Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>

diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c
index 2d1387bf1724fd2b7767d1442f17e4616cda621d..d9d954eb0fa0135e5a868cec4850237ff56f8804 100644 (file)
--- a/drivers/bus/arm-cci.c
+++ b/drivers/bus/arm-cci.c
@@ -705,7 +705,7 @@ asmlinkage void __naked cci_enable_port_for_self(void)
 
        /* Enable the CCI port */
 "      ldr     r0, [r0, %[offsetof_port_phys]] \n"
-"      mov     r3, #"__stringify(CCI_ENABLE_REQ)" \n"
+"      mov     r3, %[cci_enable_req]\n"                   
 "      str     r3, [r0, #"__stringify(CCI_PORT_CTRL)"] \n"
 
        /* poll the status reg for completion */
@@ -713,7 +713,7 @@ asmlinkage void __naked cci_enable_port_for_self(void)
 "      ldr     r0, [r1] \n"
 "      ldr     r0, [r0, r1]            @ cci_ctrl_base \n"
 "4:    ldr     r1, [r0, #"__stringify(CCI_CTRL_STATUS)"] \n"
-"      tst     r1, #1 \n"
+"      tst     r1, %[cci_control_status_bits] \n"                      
 "      bne     4b \n"
 
 "      mov     r0, #0 \n"
@@ -726,6 +726,8 @@ asmlinkage void __naked cci_enable_port_for_self(void)
 "7:    .word   cci_ctrl_phys - . \n"
        : :
        [sizeof_cpu_port] "i" (sizeof(cpu_port)),
+       [cci_enable_req] "i" cpu_to_le32(CCI_ENABLE_REQ),
+       [cci_control_status_bits] "i" cpu_to_le32(1),
 #ifndef __ARMEB__
        [offsetof_cpu_port_mpidr_lsb] "i" (offsetof(struct cpu_port, mpidr)),
 #else