MIPS: lantiq: the detection of the gpe clock is broken

The code to detect unfused SoCs was broken due to missing register masking.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/8049/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/lantiq/falcon/sysctrl.c b/arch/mips/lantiq/falcon/sysctrl.c
index 468ffa043607c602cfd7df3ac352e4e4029ecdad..7e74760cf2bdf92cc9c21f4f0042c846038a46b9 100644 (file)
--- a/arch/mips/lantiq/falcon/sysctrl.c
+++ b/arch/mips/lantiq/falcon/sysctrl.c
@@ -147,12 +147,11 @@ static void falcon_gpe_enable(void)
        if (status & (1 << (GPPC_OFFSET + 1)))
                return;
 
-       if (status_r32(STATUS_CONFIG) == 0)
+       freq = (status_r32(STATUS_CONFIG) &
+               GPEFREQ_MASK) >>
+               GPEFREQ_OFFSET;
+       if (freq == 0)
                freq = 1; /* use 625MHz on unfused chip */
-       else
-               freq = (status_r32(STATUS_CONFIG) &
-                       GPEFREQ_MASK) >>
-                       GPEFREQ_OFFSET;
 
        /* apply new frequency */
        sysctl_w32_mask(SYSCTL_SYS1, 7 << (GPPC_OFFSET + 1),