/// OptimizeCompareInstr - See if the comparison instruction can be converted
/// into something more efficient. E.g., on ARM most instructions can set the
- /// flags register, obviating the need for a separate CMP. Update the iterator
- /// *only* if a transformation took place.
+ /// flags register, obviating the need for a separate CMP.
virtual bool OptimizeCompareInstr(MachineInstr *CmpInstr,
unsigned SrcReg, int Mask, int Value,
- const MachineRegisterInfo *MRI,
- MachineBasicBlock::iterator &) const {
+ const MachineRegisterInfo *MRI) const {
return false;
}
}
private:
- bool OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB,
- MachineBasicBlock::iterator &MII);
+ bool OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB);
bool OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
SmallPtrSet<MachineInstr*, 8> &LocalMIs);
};
bool PeepholeOptimizer::
OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
SmallPtrSet<MachineInstr*, 8> &LocalMIs) {
- LocalMIs.insert(MI);
-
unsigned SrcReg, DstReg, SubIdx;
if (!TII->isCoalescableExtInstr(*MI, SrcReg, DstReg, SubIdx))
return false;
-
+
if (TargetRegisterInfo::isPhysicalRegister(DstReg) ||
TargetRegisterInfo::isPhysicalRegister(SrcReg))
return false;
/// set) the same flag as the compare, then we can remove the comparison and use
/// the flag from the previous instruction.
bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI,
- MachineBasicBlock *MBB,
- MachineBasicBlock::iterator &NextIter){
+ MachineBasicBlock *MBB){
// If this instruction is a comparison against zero and isn't comparing a
// physical register, we can try to optimize it.
unsigned SrcReg;
return false;
// Attempt to optimize the comparison instruction.
- if (TII->OptimizeCompareInstr(MI, SrcReg, CmpMask, CmpValue, MRI, NextIter)) {
+ if (TII->OptimizeCompareInstr(MI, SrcReg, CmpMask, CmpValue, MRI)) {
++NumEliminated;
return true;
}
}
bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) {
+ if (DisablePeephole)
+ return false;
+
TM = &MF.getTarget();
TII = TM->getInstrInfo();
MRI = &MF.getRegInfo();
for (MachineBasicBlock::iterator
MII = I->begin(), MIE = I->end(); MII != MIE; ) {
- MachineInstr *MI = &*MII;
-
- if (MI->getDesc().isCompare() &&
- !MI->getDesc().hasUnmodeledSideEffects()) {
- if (!DisablePeephole && OptimizeCmpInstr(MI, MBB, MII))
- Changed = true;
- else
- ++MII;
+ MachineInstr *MI = &*MII++;
+ LocalMIs.insert(MI);
+
+ if (MI->getDesc().hasUnmodeledSideEffects())
+ continue;
+
+ if (MI->getDesc().isCompare()) {
+ Changed |= OptimizeCmpInstr(MI, MBB);
} else {
Changed |= OptimizeExtInstr(MI, MBB, LocalMIs);
- ++MII;
}
}
}
}
/// OptimizeCompareInstr - Convert the instruction supplying the argument to the
-/// comparison into one that sets the zero bit in the flags register. Update the
-/// iterator *only* if a transformation took place.
+/// comparison into one that sets the zero bit in the flags register.
bool ARMBaseInstrInfo::
OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask,
- int CmpValue, const MachineRegisterInfo *MRI,
- MachineBasicBlock::iterator &MII) const {
+ int CmpValue, const MachineRegisterInfo *MRI) const {
if (CmpValue != 0)
return false;
MI->RemoveOperand(5);
MachineInstrBuilder(MI)
.addReg(ARM::CPSR, RegState::Define | RegState::Implicit);
- MII = llvm::next(MachineBasicBlock::iterator(CmpInstr));
CmpInstr->eraseFromParent();
return true;
}
/// that we can remove a "comparison with zero".
virtual bool OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg,
int CmpMask, int CmpValue,
- const MachineRegisterInfo *MRI,
- MachineBasicBlock::iterator &MII) const;
+ const MachineRegisterInfo *MRI) const;
virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData,
const MachineInstr *MI) const;