ARM: socfpga: dts: add enable-method property for cpu nodes

Add the enable-method property for the cpu node on socfpga.dtsi and
socfpga_arria10.dtsi. This is for CPU_METHOD_OF_DECLARE to use to enable
the secondary core.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index d9176e6061731b7c42ee792338fab3509482c603..3a02b417ba87327b0c2fd0d9488ecc16ad2ed8c0 100644 (file)
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -36,6 +36,7 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
+               enable-method = "altr,socfpga-smp";
 
                cpu@0 {
                        compatible = "arm,cortex-a9";

diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 4cf0733b930b98bbef8f63d59fee61b24c49e397..774e041b25722c6f6c9932845e80cbd92bc0bed1 100644 (file)
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -36,6 +36,7 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
+               enable-method = "altr,socfpga-a10-smp";
 
                cpu@0 {
                        compatible = "arm,cortex-a9";