reboot function
author吴庆棋 <wqq@rock-chips.com>
Sat, 12 Jun 2010 05:31:11 +0000 (05:31 +0000)
committer黄涛 <huangtao@rock-chips.com>
Mon, 21 Jun 2010 05:35:26 +0000 (13:35 +0800)
.config
arch/arm/kernel/process.c
arch/arm/mach-rk2818/ddr.c
drivers/staging/Kconfig
drivers/staging/Makefile
drivers/staging/rk2818/rk2818_power/Kconfig [new file with mode: 0644]
drivers/staging/rk2818/rk2818_power/Makefile [new file with mode: 0644]
drivers/staging/rk2818/rk2818_power/rk2818_power.c [new file with mode: 0644]
kernel/sys.c

diff --git a/.config b/.config
index c5124e7ec6f4ed6349eb2ee03d6e55fb0374a084..7c2610e04ed3f0b6391bd260a97d05cc3b7aadb6 100644 (file)
--- a/.config
+++ b/.config
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
 # Linux kernel version: 2.6.32.9
-# Thu Jun  3 16:12:45 2010
+# Sat Jun 12 13:09:57 2010
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -76,7 +76,6 @@ CONFIG_EMBEDDED=y
 CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
@@ -443,8 +442,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
 # CONFIG_FIRMWARE_IN_KERNEL is not set
 CONFIG_EXTRA_FIRMWARE=""
-# CONFIG_DEBUG_DRIVER is not set
-# CONFIG_DEBUG_DEVRES is not set
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
@@ -766,7 +763,6 @@ CONFIG_I2C1_RK2818=y
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 CONFIG_SPI=y
-# CONFIG_SPI_DEBUG is not set
 CONFIG_SPI_MASTER=y
 
 #
@@ -788,7 +784,6 @@ CONFIG_SPIM_RK2818=y
 # CONFIG_PPS is not set
 CONFIG_ARCH_REQUIRE_GPIOLIB=y
 CONFIG_GPIOLIB=y
-# CONFIG_DEBUG_GPIO is not set
 # CONFIG_GPIO_SYSFS is not set
 
 #
@@ -986,7 +981,6 @@ CONFIG_SND_ROCKCHIP_SOC=y
 CONFIG_SND_ROCKCHIP_SOC_I2S=y
 CONFIG_SND_ROCKCHIP_SOC_WM8988=y
 # CONFIG_SND_ROCKCHIP_SOC_WM8994 is not set
-# CONFIG_SND_ROCKCHIP_SOC_RK1000 is not set
 CONFIG_SND_ROCKCHIP_SOC_SLAVE=y
 # CONFIG_SND_ROCKCHIP_SOC_MASTER is not set
 CONFIG_SND_SOC_I2C_AND_SPI=y
@@ -1008,7 +1002,6 @@ CONFIG_USB_ARCH_HAS_HCD=y
 # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
 #
 CONFIG_USB_GADGET=y
-# CONFIG_USB_GADGET_DEBUG is not set
 # CONFIG_USB_GADGET_DEBUG_FILES is not set
 CONFIG_USB_GADGET_VBUS_DRAW=2
 CONFIG_USB_GADGET_SELECTED=y
@@ -1212,6 +1205,16 @@ CONFIG_ANDROID_LOW_MEMORY_KILLER=y
 #
 CONFIG_RK2818_DSP=y
 
+#
+# RK1000 control
+#
+# CONFIG_RK1000_CONTROL is not set
+
+#
+# rk2818 POWER CONTROL
+#
+CONFIG_RK2818_POWER=y
+
 #
 # File systems
 #
index 3b1aac1da0bd46068fd4995d415545b2ba2f1cbf..eb6148fdd5e0ebe3181fb054e781c7194f017422 100644 (file)
 #include <asm/stacktrace.h>
 #include <asm/mach/time.h>
 
+/***************
+*    DEBUG
+****************/
+#define RESTART_DEBUG
+#ifdef RESTART_DEBUG
+#define restart_dbg(format, arg...) \
+       printk("RESTART_DEBUG : " format "\n" , ## arg)
+#else
+#define restart_dbg(format, arg...) do {} while (0)
+#endif
+
+
 static const char *processor_modes[] = {
   "USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" , "UK4_26" , "UK5_26" , "UK6_26" , "UK7_26" ,
   "UK8_26" , "UK9_26" , "UK10_26", "UK11_26", "UK12_26", "UK13_26", "UK14_26", "UK15_26",
@@ -85,6 +97,10 @@ __setup("hlt", hlt_setup);
 
 void arm_machine_restart(char mode, const char *cmd)
 {
+       /*
+       *  debug trace
+       */
+       restart_dbg("%s->%s->%d->mode=%d cmd=%s",__FILE__,__FUNCTION__,__LINE__,mode,cmd);
        /*
         * Clean and disable cache, and turn off interrupts
         */
@@ -197,12 +213,23 @@ void machine_halt(void)
 
 void machine_power_off(void)
 {
+       restart_dbg("%s->%s->%d",__FILE__,__FUNCTION__,__LINE__);
        if (pm_power_off)
                pm_power_off();
 }
 
 void machine_restart(char *cmd)
 {
+       restart_dbg("%s->%s->%d->cmd=%s reboot_mode=%c",__FILE__,__FUNCTION__,__LINE__,cmd,reboot_mode);
+       if(reboot_mode == 'h')                  /*no boot parameter*/
+               reboot_mode = 0;
+       if(cmd) {
+               reboot_mode = 0;
+               if( !strcmp( cmd , "recovery" ) )
+                       reboot_mode = 3;
+               else if( !strcmp( cmd , "loader" ) )
+                       reboot_mode = 1;
+        }
        arm_pm_restart(reboot_mode, cmd);
 }
 
index 1a0093d64a7696b14b61e9874f467919e0ad01c7..e41e088b9b7e3d15144fc72ba0f420ebe10d793e 100644 (file)
@@ -47,8 +47,10 @@ Revision 1.2  2009/03/07 07:30:18  yk
 #include <linux/irqflags.h>
 #include <linux/string.h>
 #include <linux/version.h>
-
+#include <asm/uaccess.h>
 #include <asm/tcm.h>
+#include <asm/io.h>
+
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 32))
 #include <mach/rk2818_iomap.h>
 #include <mach/memory.h>
@@ -664,8 +666,8 @@ typedef volatile struct tagUART_STRUCT
  uint32 __tcmdata DDRnewKHz = 400000 ; //266000;
  uint32 __tcmdata SDRAMoldKHz = 66000;
  uint32 __tcmdata DDRoldKHz = 200000;
- unsigned int __tcmdata ddr_reg[8] ;
- volatile int __tcmdata rk28_debugs = 0;
+
+ volatile int __tcmdata rk28_debugs = 1;
  uint32 __tcmdata save_sp;
  
 __tcmdata uint32 bFreqRaise;
@@ -1107,14 +1109,8 @@ static void __tcmfunc SDRAM_BeforeUpdateFreq(uint32 SDRAMnewKHz, uint32 DDRnewKH
     uint32 memType = DDR_MEM_TYPE();// (pGRF_Reg->CPU_APB_REG0) & MEMTYPEMASK;
     uint32 tmp;
        volatile uint32 *p_ddr = (volatile uint32 *)0xc0080000;
-       //uint32 *ddr_reg = 0xff401c00;
-       ddr_reg[0] = pGRF_Reg->CPU_APB_REG0;
-       ddr_reg[1] = pGRF_Reg->CPU_APB_REG1;
-       
-       
-       ddr_reg[4] = pDDR_Reg->CTRL_REG_10;
-       
-       ddr_reg[6] = pDDR_Reg->CTRL_REG_78;
+
+
     switch(memType)
     {
         case Mobile_SDRAM:
@@ -1155,7 +1151,7 @@ static void __tcmfunc SDRAM_BeforeUpdateFreq(uint32 SDRAMnewKHz, uint32 DDRnewKH
             }
             DDRPreUpdateRef(DDRnewKHz);
             DDRPreUpdateTiming(DDRnewKHz);
-                       printk("%s::just befor ddr refresh.ahb=%ld,new ddr=%ld\n" , __func__ , SDRAMnewKHz , DDRnewKHz);
+            printk("%s::just befor ddr refresh.ahb=%ld,new ddr=%ld\n" , __func__ , SDRAMnewKHz , DDRnewKHz);
                        //WAIT_ME();
             while(pGRF_Reg->CPU_APB_REG1 & 0x100);
                        tmp = *p_ddr;  //read to wakeup
@@ -1204,7 +1200,6 @@ static void __tcmfunc SDRAM_AfterUpdateFreq(uint32 SDRAMoldKHz, uint32 DDRnewKHz
     uint32 ddrKHz;
     //uint32 ahbKHz;
     uint32 memType = DDR_MEM_TYPE();// (pGRF_Reg->CPU_APB_REG0) & MEMTYPEMASK;
-       DDR_debug_string("21\n");
     switch(memType)
     {
         case Mobile_SDRAM:
@@ -1251,10 +1246,10 @@ static void __tcmfunc SDRAM_AfterUpdateFreq(uint32 SDRAMoldKHz, uint32 DDRnewKHz
             }
             pDDR_Reg->CTRL_REG_09 &= ~(0x1 << 24);
             while(pDDR_Reg->CTRL_REG_03 & 0x100); // exit 
-                       printk("exit ddr refresh,");
+                       //printk("exit ddr refresh,");
             //Í˳ö×Ôˢкó£¬ÔÙËãelementµÄÖµ
             ddrKHz = PLLGetDDRFreq();
-                       printk("new ddr kHz=%ld\n" , ddrKHz);
+                       //printk("new ddr kHz=%ld\n" , ddrKHz);
             if(110000 < ddrKHz)
             {
                 value = pDDR_Reg->CTRL_REG_78;
@@ -1269,22 +1264,6 @@ static void __tcmfunc SDRAM_AfterUpdateFreq(uint32 SDRAMoldKHz, uint32 DDRnewKHz
     }
 }
 
-static void __tcmfunc rk281x_restart( void )
-{
-        void (*boot)(void) = (void (*)(void))0;
-        #define pSCU_Reg       ((pSCU_REG)SCU_BASE_ADDR_VA)
-        #define pGRF_Reg       ((pGRF_REG)REG_FILE_BASE_ADDR_VA)
-
-        asm( "MRC p15,0,r0,c1,c0,0\n"
-                "BIC r0,r0,#(1<<0)     @disable mmu\n"
-                "BIC r0,r0,#(1<<13)    @set vector to 0x00000000\n"
-                "MCR p15,0,r0,c1,c0,0\n"
-                "mov r1,r1\n"
-                "mov r1,r1\n" );
-        pSCU_Reg->SCU_MODE_CON |= (3<<2); // arm slow mod
-        pGRF_Reg->CPU_APB_REG5 &= ~(1<<0); // no remap.
-        boot();
-}
 
 
 /*SCU PLL CON , 20100518,copy from rk28_scu_hw.c
@@ -1387,9 +1366,10 @@ static void  SDRAM_DDR_Init(void)
             pDDR_Reg->CTRL_REG_36 = 0x1F1F;
                        
        printk("..%s -->capability ==%ld telement==%ld -->%d\n",__FUNCTION__,capability,telement,__LINE__);
-       ddr_change_freq( 351 );
+       ddr_change_freq( 266 );
 }
 
+
 unsigned long ddr_save_sp( unsigned long new_sp );
 asm(   
 "      .section \".tcm.text\",\"ax\"\n"        
@@ -1403,7 +1383,7 @@ asm(
 "      .previous"
 );
 
-void(*rk28_restart_mmu)(void )= (void(*)(void ))rk281x_restart;
+
 
 extern void clk_recalculate_root_clocks(void);
 
@@ -1412,18 +1392,7 @@ static int __init update_frq(void)
        unsigned long ps_sram = (DTCM_END&(~7));
        //printk(">>>>>%s-->%d\n",__FUNCTION__,__LINE__);
        int *reg = (int *)(SCU_BASE_ADDR_VA);
-       ddr_reg[0] = pGRF_Reg->CPU_APB_REG0;
-       ddr_reg[1] = pGRF_Reg->CPU_APB_REG1;
-       ddr_reg[2] = pDDR_Reg->CTRL_REG_03;
-       ddr_reg[3] = pDDR_Reg->CTRL_REG_09;
-       ddr_reg[4] = pDDR_Reg->CTRL_REG_10;
-       ddr_reg[5] = pDDR_Reg->CTRL_REG_36;
-       ddr_reg[6] = pDDR_Reg->CTRL_REG_78;
-       printk(" before 0x%08x 0x%08x 0x%08x 0x%08x\n"
-                            "0x%08x 0x%08x 0x%08x \n"
-                          //  "0x%08x 0x%08x 0x%08x 0x%08x\n" ,
-                            ,ddr_reg[0],ddr_reg[1],ddr_reg[2],ddr_reg[3],
-                            ddr_reg[4],ddr_reg[5],ddr_reg[6]);
+
        strcpy( (char*)(ps_sram-0x40) , "rk281x_ddr_sram-wqq\n" );
 //     printk( "sram data:%s\n" , (char*)(ps_sram-0x40) );
        local_irq_disable();
@@ -1433,19 +1402,7 @@ static int __init update_frq(void)
        SDRAM_DDR_Init();
        ddr_save_sp(save_sp);
        printk("after SDRAM_DDR_Init\n");
-       local_irq_enable();             
-       ddr_reg[0] = pGRF_Reg->CPU_APB_REG0;
-       ddr_reg[1] = pGRF_Reg->CPU_APB_REG1;
-       ddr_reg[2] = pDDR_Reg->CTRL_REG_03;
-       ddr_reg[3] = pDDR_Reg->CTRL_REG_09;
-       ddr_reg[4] = pDDR_Reg->CTRL_REG_10;
-       ddr_reg[5] = pDDR_Reg->CTRL_REG_36;
-       ddr_reg[6] = pDDR_Reg->CTRL_REG_78;
-       printk("after 0x%08x 0x%08x 0x%08x 0x%08x\n"
-                            "0x%08x 0x%08x 0x%08x \n"
-                          //  "0x%08x 0x%08x 0x%08x 0x%08x\n" ,
-                            ,ddr_reg[0],ddr_reg[1],ddr_reg[2],ddr_reg[3],
-                            ddr_reg[4],ddr_reg[5],ddr_reg[6]);
+       local_irq_enable();     
 
        printk("scu after frq%s::\n0x%08x 0x%08x 0x%08x 0x%08x\n"
                             "0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n"
@@ -1460,6 +1417,86 @@ static int __init update_frq(void)
 }
 core_initcall_sync(update_frq);
 
+/****************************************************************/
+//º¯ÊýÃû:SDRAM_DDR_Disable_Sleep
+//ÃèÊö:½ûÖ¹×Ô¶¯sleepģʽ
+//²ÎÊý˵Ã÷:
+//·µ»ØÖµ:
+//Ïà¹ØÈ«¾Ö±äÁ¿:
+//×¢Òâ:
+/****************************************************************/
+static void  SDRAM_DDR_Disable_Sleep(void)
+{
+       volatile uint32 *p_ddr = (volatile uint32 *)0xc0080000;
+       unsigned int tmp;
+       while(pGRF_Reg->CPU_APB_REG1 & 0x100);
+               tmp = *p_ddr;  //read to wakeup
+               pDDR_Reg->CTRL_REG_36 &= ~(0x1F << 8);
+        while(pDDR_Reg->CTRL_REG_03 & 0x100)
+        {              
+            tmp = *p_ddr;  //read to wakeup
+        }                                      
+        while(pGRF_Reg->CPU_APB_REG1 & 0x100);
+}
+
+static void rk2818_reduce_ddrfrq(void)
+{
+       unsigned long ps_sram = (DTCM_END&(~7));
+       save_sp = ddr_save_sp(ps_sram);
+       ddr_change_freq( 133);
+       ddr_save_sp(save_sp);
+}
+static void __tcmfunc rk2818_reduce_corevoltage(int mmu)
+{
+#define        read_XDATA32(address)                      (*((unsigned int volatile*)(address)))
+#define        write_XDATA32(address, value)      (*((unsigned int volatile*)(address)) = value)
+
+       if(mmu)
+       {
+
+               write_XDATA32((RK2818_GPIO1_BASE+0x24), (read_XDATA32(RK2818_GPIO1_BASE+0x24)&(~(1ul<<6)))); //GPIOPortH_Pin6
+               write_XDATA32((RK2818_GPIO1_BASE+0x28), (read_XDATA32(RK2818_GPIO1_BASE+0x28)&(~(1ul<<6))));
+       }       
+       else
+       {
+               write_XDATA32((RK2818_GPIO1_PHYS+0x24), 0);//GPIOPortH_Pin6
+               write_XDATA32((RK2818_GPIO1_PHYS+0x28), 0);
+       }
+}
+ void __tcmfunc rk281x_restart( void )
+{
+               int i;
+               void (*boot)(void) = (void (*)(void))0;
+               #define pSCU_Reg           ((pSCU_REG)SCU_BASE_ADDR_VA)
+               #define pGRF_Reg           ((pGRF_REG)REG_FILE_BASE_ADDR_VA)
+               SDRAM_DDR_Disable_Sleep();
+               pSCU_Reg->SCU_CLKSEL0_CON &= (~(3<<2));
+               pSCU_Reg->SCU_MODE_CON |= (3<<2); // arm slow mod
+               for(i=0;i<10000;i++);
+               pGRF_Reg->CPU_APB_REG5 &= ~(1<<0); // no remap.
+               
+               rk2818_reduce_corevoltage(1);
+               asm( "MRC p15,0,r0,c1,c0,0\n"
+                               "BIC r0,r0,#(1<<0)         @disable mmu\n"
+                               "BIC r0,r0,#(1<<13)    @set vector to 0x00000000\n"
+                               "MCR p15,0,r0,c1,c0,0\n"
+                               "mov r1,r1\n"
+                               "mov r1,r1\n" 
+                                "ldr r2,=0x10040804        @usb soft disconnect.\n"
+                               " mov r3,#2\n"
+                                "str r3,[r2,#0]\n"
+
+                                "ldr r2,=0x100AE00C       @ BCH reset.\n"
+                               " mov r3,#1\n"
+                               "str r3,[r2,#0]\n"
+                               );
+               //while(rk28_debugs);
+               boot();
+}
+
+
+void(*rk2818_reboot)(void )= (void(*)(void ))rk281x_restart;
+
 #if 0
 /****************************************************************/
 //º¯ÊýÃû:SDRAM_EnterSelfRefresh
index e4f3d9372694104e35550c146972228b1570bf9e..ec496cc2be3f84e78afe3585926951d5b5afcdae 100644 (file)
@@ -129,6 +129,6 @@ source "drivers/staging/rk2818/rk2818_dsp/Kconfig"
 
 source "drivers/staging/rk2818/rk1000_control/Kconfig"
 
-source "drivers/staging/rk2818/rk1000_tv/Kconfig"
+source "drivers/staging/rk2818/rk2818_power/Kconfig"
 endif # !STAGING_EXCLUDE_BUILD
 endif # STAGING
index f4d1b2533eaeda4d7d9f4f51d153af0368b05858..f34adae433904e53e13ed57ab0bdbdcfb041a513 100644 (file)
@@ -47,3 +47,4 @@ obj-$(CONFIG_IIO)             += iio/
 obj-$(CONFIG_RK2818_DSP)        += rk2818/rk2818_dsp/
 obj-$(CONFIG_RK1000_CONTROL)    += rk2818/rk1000_control/
 obj-$(CONFIG_RK1000_TVOUT)    += rk2818/rk1000_tv/
+obj-$(CONFIG_RK2818_POWER)                             += rk2818/rk2818_power/
diff --git a/drivers/staging/rk2818/rk2818_power/Kconfig b/drivers/staging/rk2818/rk2818_power/Kconfig
new file mode 100644 (file)
index 0000000..2ed9f9f
--- /dev/null
@@ -0,0 +1,7 @@
+menu "rk2818 POWER CONTROL"
+config RK2818_POWER
+       tristate "ROCKCHIP RK2818 POWER CONTROL"
+       default y
+       help
+          rk2818 power operation. Here control chip power reset or power off.
+endmenu
diff --git a/drivers/staging/rk2818/rk2818_power/Makefile b/drivers/staging/rk2818/rk2818_power/Makefile
new file mode 100644 (file)
index 0000000..6e95707
--- /dev/null
@@ -0,0 +1,6 @@
+#
+# Makefile for the chip info core.
+#
+
+obj-$(CONFIG_RK2818_POWER)     += rk2818_power.o
+
diff --git a/drivers/staging/rk2818/rk2818_power/rk2818_power.c b/drivers/staging/rk2818/rk2818_power/rk2818_power.c
new file mode 100644 (file)
index 0000000..fb7516c
--- /dev/null
@@ -0,0 +1,80 @@
+/*
+* Copyright (C) 2010 ROCKCHIP, Inc.
+*
+* This software is licensed under the terms of the GNU General Public
+* License version 2, as published by the Free Software Foundation, and
+* may be copied, distributed, and modified under those terms.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+*/
+
+#include <linux/irqflags.h>
+#include <linux/kernel.h>
+#include <asm/io.h>
+#include <mach/gpio.h>
+#include <mach/hardware.h>
+#include <mach/rk2818_iomap.h>
+
+/***************
+*       DEBUG
+****************/
+#define RESTART_DEBUG
+#ifdef RESTART_DEBUG
+#define restart_dbg(format, arg...) \
+                               printk("RESTART_DEBUG : " format "\n" , ## arg)
+#else
+#define restart_dbg(format, arg...) do {} while (0)
+#endif
+
+extern void(*rk2818_reboot)(void );
+
+static void rk2818_kernel_reboot(void)
+{
+       restart_dbg("%s->%s->%d",__FILE__,__FUNCTION__,__LINE__);
+       local_irq_disable();
+       rk2818_reboot();
+}
+
+
+/* 
+ * reset: 0 : normal reset 1: panic , 2: hard reset.
+ * boot : 0: normal , 1: loader , 2: maskrom , 3:recovery
+ *
+ */
+
+ int rk2818_restart( int       mode, const char *cmd) 
+{
+               restart_dbg("%s->%s->%d",__FILE__,__FUNCTION__,__LINE__);
+               switch ( mode ) {
+               case 0:
+                               rk2818_kernel_reboot( );        // normal 
+                               break;
+               case 1:
+                               //rk28_usb();
+                               //kld_reboot( 0 , type );        // loader usb 
+                               break;
+               case 2:
+                               //rk28_usb();
+                               //kld_reboot( 0 , type );        // maksrom usb
+                               break;
+               case 3:
+                               //kld_reboot( 0 , type );        // normal and recover
+                               break;
+               case 4:
+                               *(int*)(0xfe04c0fa) = 0xe5e6e700;
+                               break;
+               default:
+                               {
+                               void(*deader)(void) = (void(*)(void))0xc600c400;
+                               deader();
+                               }
+                               break;
+               }
+               return 0x24;
+}
+EXPORT_SYMBOL(rk2818_restart);
+
index ce17760d9c516720af8dcf1522b47da937ba0023..3bfc93832e5a37400b655ab16223aaa087d4ccde 100644 (file)
 #include <asm/uaccess.h>
 #include <asm/io.h>
 #include <asm/unistd.h>
+/***************
+*       DEBUG
+****************/
+#define RESTART_DEBUG
+#ifdef RESTART_DEBUG
+#define restart_dbg(format, arg...) \
+       printk("RESTART_DEBUG : " format "\n" , ## arg)
+#else
+#define restart_dbg(format, arg...) do {} while (0)
+#endif
+
+
 
 #ifndef SET_UNALIGN_CTL
 # define SET_UNALIGN_CTL(a,b)  (-EINVAL)
@@ -302,11 +314,16 @@ void kernel_restart_prepare(char *cmd)
  */
 void kernel_restart(char *cmd)
 {
+       /*
+       *  debug trace
+       */
+       restart_dbg("%s->%d->cmd=%s",__FUNCTION__,__LINE__,cmd);
+       
        kernel_restart_prepare(cmd);
        if (!cmd)
-               printk(KERN_EMERG "Restarting system.\n");
+               printk( "Restarting system.\n");
        else
-               printk(KERN_EMERG "Restarting system with command '%s'.\n", cmd);
+               printk( "Restarting system with command '%s'.\n", cmd);
        machine_restart(cmd);
 }
 EXPORT_SYMBOL_GPL(kernel_restart);
@@ -384,6 +401,11 @@ SYSCALL_DEFINE4(reboot, int, magic1, int, magic2, unsigned int, cmd,
        lock_kernel();
        switch (cmd) {
        case LINUX_REBOOT_CMD_RESTART:
+               /*
+               *  debug trace
+               */
+               restart_dbg("%s->%d->cmd=%x",__FUNCTION__,__LINE__,cmd);
+               
                kernel_restart(NULL);
                break;
 
@@ -402,6 +424,11 @@ SYSCALL_DEFINE4(reboot, int, magic1, int, magic2, unsigned int, cmd,
                panic("cannot halt");
 
        case LINUX_REBOOT_CMD_POWER_OFF:
+               /*
+               *  debug trace
+               */
+               restart_dbg("%s->%d->cmd=%x",__FUNCTION__,__LINE__,cmd);
+               
                kernel_power_off();
                unlock_kernel();
                do_exit(0);
@@ -413,7 +440,11 @@ SYSCALL_DEFINE4(reboot, int, magic1, int, magic2, unsigned int, cmd,
                        return -EFAULT;
                }
                buffer[sizeof(buffer) - 1] = '\0';
-
+               /*
+               *  debug trace
+               */
+               restart_dbg("%s->%d->cmd=%x args=%s",__FUNCTION__,__LINE__,cmd,buffer);
+               
                kernel_restart(buffer);
                break;