/// DAGCCToARMCC - Convert a DAG integer condition code to an ARM CC
static ARMCC::CondCodes DAGCCToARMCC(ISD::CondCode CC) {
switch (CC) {
- default: assert(0 && "Unknown condition code!");
+ default:
+ std::cerr << "CC = " << CC << "\n";
+ assert(0 && "Unknown condition code!");
+ case ISD::SETUGT: return ARMCC::HI;
+ case ISD::SETULE: return ARMCC::LS;
+ case ISD::SETLE: return ARMCC::LE;
+ case ISD::SETLT: return ARMCC::LT;
+ case ISD::SETGT: return ARMCC::GT;
case ISD::SETNE: return ARMCC::NE;
case ISD::SETEQ: return ARMCC::EQ;
case ISD::SETGE: return ARMCC::GE;
-; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=arm &&
+; RUN: llvm-as < %s | llc -march=arm | grep moveq | wc -l | grep 1 &&
+; RUN: llvm-as < %s | llc -march=arm | grep movgt | wc -l | grep 1 &&
+; RUN: llvm-as < %s | llc -march=arm | grep movlt | wc -l | grep 1 &&
+; RUN: llvm-as < %s | llc -march=arm | grep movle | wc -l | grep 1 &&
+; RUN: llvm-as < %s | llc -march=arm | grep movls | wc -l | grep 1 &&
+; RUN: llvm-as < %s | llc -march=arm | grep movhi | wc -l | grep 1
-int %f(int %a) {
+int %f1(int %a) {
entry:
%tmp = seteq int %a, 4 ; <bool> [#uses=1]
%tmp1 = select bool %tmp, int 2, int 3
ret int %tmp1
}
+
+int %f2(int %a) {
+entry:
+ %tmp = setgt int %a, 4 ; <bool> [#uses=1]
+ %tmp1 = select bool %tmp, int 2, int 3
+ ret int %tmp1
+}
+
+int %f3(int %a, int %b) {
+entry:
+ %tmp = setlt int %a, %b ; <bool> [#uses=1]
+ %tmp1 = select bool %tmp, int 2, int 3
+ ret int %tmp1
+}
+
+int %f4(int %a, int %b) {
+entry:
+ %tmp = setle int %a, %b ; <bool> [#uses=1]
+ %tmp1 = select bool %tmp, int 2, int 3
+ ret int %tmp1
+}
+
+int %f5(uint %a, uint %b) {
+entry:
+ %tmp = setle uint %a, %b ; <bool> [#uses=1]
+ %tmp1 = select bool %tmp, int 2, int 3
+ ret int %tmp1
+}
+
+int %f6(uint %a, uint %b) {
+entry:
+ %tmp = setgt uint %a, %b ; <bool> [#uses=1]
+ %tmp1 = select bool %tmp, int 2, int 3
+ ret int %tmp1
+}