--- /dev/null
+//===-- ARMTargetFrameInfo.h - Define TargetFrameInfo for ARM ---*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the "Instituto Nokia de Tecnologia" and
+// is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+//
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef ARM_FRAMEINFO_H
+#define ARM_FRAMEINFO_H
+
+#include "ARM.h"
+#include "llvm/Target/TargetFrameInfo.h"
+#include "llvm/Target/TargetMachine.h"
+
+namespace llvm {
+
+class ARMFrameInfo: public TargetFrameInfo {
+ std::pair<unsigned, int> LR[1];
+
+public:
+ ARMFrameInfo()
+ : TargetFrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
+ LR[0].first = ARM::R14;
+ LR[0].second = -4;
+ }
+
+ const std::pair<unsigned, int> *
+ getCalleeSaveSpillSlots(unsigned &NumEntries) const {
+ NumEntries = 1;
+ return &LR[0];
+ }
+};
+
+} // End llvm namespace
+
+#endif
SDOperand Callee = Op.getOperand(4);
unsigned NumOps = (Op.getNumOperands() - 5) / 2;
- // Count how many bytes are to be pushed on the stack. Initially
- // only the link register.
- unsigned NumBytes = 4;
+ // Count how many bytes are to be pushed on the stack.
+ unsigned NumBytes = 0;
// Add up all the space actually used.
for (unsigned i = 4; i < NumOps; ++i)
def bx: InstARM<(ops), "bx r14", [(retflag)]>;
}
-let Defs = [R0, R1, R2, R3] in {
+let Defs = [R0, R1, R2, R3, R14] in {
def bl: InstARM<(ops i32imm:$func, variable_ops), "bl $func", [(ARMcall tglobaladdr:$func)]>;
}
}
const unsigned* ARMRegisterInfo::getCalleeSaveRegs() const {
- static const unsigned CalleeSaveRegs[] = { 0 };
+ static const unsigned CalleeSaveRegs[] = {
+ ARM::R4, ARM::R5, ARM::R6, ARM::R7,
+ ARM::R8, ARM::R9, ARM::R10, ARM::R11,
+ ARM::R14, 0
+ };
return CalleeSaveRegs;
}
const TargetRegisterClass* const *
ARMRegisterInfo::getCalleeSaveRegClasses() const {
- static const TargetRegisterClass * const CalleeSaveRegClasses[] = { 0 };
+ static const TargetRegisterClass * const CalleeSaveRegClasses[] = {
+ &ARM::IntRegsRegClass, &ARM::IntRegsRegClass, &ARM::IntRegsRegClass, &ARM::IntRegsRegClass,
+ &ARM::IntRegsRegClass, &ARM::IntRegsRegClass, &ARM::IntRegsRegClass, &ARM::IntRegsRegClass,
+ &ARM::IntRegsRegClass, 0
+ };
return CalleeSaveRegClasses;
}
// entry to the current function. This eliminates the need for add/sub
// brackets around call sites.
NumBytes += MFI->getMaxCallFrameSize();
- } else {
- NumBytes += 4;
}
MFI->setStackSize(NumBytes);
//sub sp, sp, #NumBytes
BuildMI(MBB, MBBI, ARM::subri, 2, ARM::R13).addReg(ARM::R13).addImm(NumBytes);
- //str lr, [sp, #NumBytes - 4]
- BuildMI(MBB, MBBI, ARM::str, 2, ARM::R14).addImm(NumBytes - 4).addReg(ARM::R13);
}
void ARMRegisterInfo::emitEpilogue(MachineFunction &MF,
MachineFrameInfo *MFI = MF.getFrameInfo();
int NumBytes = (int) MFI->getStackSize();
- //ldr lr, [sp]
- BuildMI(MBB, MBBI, ARM::ldr, 2, ARM::R14).addImm(NumBytes - 4).addReg(ARM::R13);
//add sp, sp, #NumBytes
BuildMI(MBB, MBBI, ARM::addri, 2, ARM::R13).addReg(ARM::R13).addImm(NumBytes);
}
//===----------------------------------------------------------------------===//
#include "ARMTargetMachine.h"
+#include "ARMFrameInfo.h"
#include "ARM.h"
#include "llvm/Assembly/PrintModulePass.h"
#include "llvm/Module.h"
///
ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS)
: TargetMachine("ARM"), DataLayout("E-p:32:32"),
- FrameInfo(TargetFrameInfo::StackGrowsDown, 8, -4) {
+ FrameInfo() {
}
unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/PassManager.h"
#include "ARMInstrInfo.h"
+#include "ARMFrameInfo.h"
namespace llvm {
class ARMTargetMachine : public TargetMachine {
const TargetData DataLayout; // Calculates type size & alignment
ARMInstrInfo InstrInfo;
- TargetFrameInfo FrameInfo;
+ ARMFrameInfo FrameInfo;
public:
ARMTargetMachine(const Module &M, const std::string &FS);