R600/SI: Add pattern to simplify i64 loading

This is a candidate for the stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175356 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/R600/SIInstrInfo.td b/lib/Target/R600/SIInstrInfo.td
index efc6015c681473ce1ac7fece18cb591e25bb98b6..8c4e5afdeb76f860c70c363f1cbe79e8b2d86479 100644 (file)
--- a/lib/Target/R600/SIInstrInfo.td
+++ b/lib/Target/R600/SIInstrInfo.td
@@ -40,6 +40,10 @@ def IMM12bit : ImmLeaf <
   [{return isUInt<12>(Imm);}]
 >;
 
+class InlineImm <ValueType vt> : ImmLeaf <vt, [{
+  return -16 <= Imm && Imm <= 64;
+}]>;
+
 class InstSI <dag outs, dag ins, string asm, list<dag> pattern> :
     AMDGPUInst<outs, ins, asm, pattern> {
 

diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td
index 7a83303eef7a5acca9cb57d1911639c33b925d01..9372993dd4406bba74f8711b6f2964a37b21bd40 100644 (file)
--- a/lib/Target/R600/SIInstructions.td
+++ b/lib/Target/R600/SIInstructions.td
@@ -1292,6 +1292,11 @@ def : Pat <
   (S_MOV_B32 fpimm:$imm)
 >;
 
+def : Pat <
+  (i64 InlineImm<i64>:$imm),
+  (S_MOV_B64 InlineImm<i64>:$imm)
+>;
+
 // i64 immediates aren't supported in hardware, split it into two 32bit values
 def : Pat <
   (i64 imm:$imm),