tg3: Abort phy init for 5717 serdes devices
authorMatt Carlson <mcarlson@broadcom.com>
Wed, 20 Jan 2010 16:58:05 +0000 (16:58 +0000)
committerDavid S. Miller <davem@davemloft.net>
Thu, 21 Jan 2010 03:20:59 +0000 (19:20 -0800)
The 5717 serdes devices have a different phy register layout than all
other previous serdes devices.  This patch aborts the phy init sequence
in tg3_phy_reset() if the device is a 5717 serdes.  It also aborts the
tg3_phy_toggle_apd() operation.  Most other operations in the MII_SERDES
path are O.K.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Reviewed-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/tg3.c

index 4a653478edd6545d6023c203ddf0eaf880c97923..7a36bf4dc968052ceca2459f22ea7d339f47849e 100644 (file)
@@ -1560,7 +1560,9 @@ static void tg3_phy_toggle_apd(struct tg3 *tp, bool enable)
 {
        u32 reg;
 
-       if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
+       if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ||
+               (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 &&
+            (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)))
                return;
 
        if (tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET) {
@@ -1935,6 +1937,10 @@ static int tg3_phy_reset(struct tg3 *tp)
                }
        }
 
+       if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 &&
+           (tp->tg3_flags2 & TG3_FLG2_MII_SERDES))
+               return 0;
+
        tg3_phy_apply_otp(tp);
 
        if (tp->tg3_flags3 & TG3_FLG3_PHY_ENABLE_APD)