the lo-reg first. This is fallout from my ppc calling conv change yesterday,
it fixes test/ExecutionEngine/2003-05-06-LivenessClobber.llx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34983
91177308-0d34-0410-b5e6-
96231b3b80d8
if (Tmp2.getValueType() != MVT::Vector) {
SDOperand Lo, Hi;
ExpandOp(Tmp2, Lo, Hi);
+
+ // Big endian systems want the hi reg first.
+ if (!TLI.isLittleEndian())
+ std::swap(Lo, Hi);
+
if (Hi.Val)
Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3, Hi,Tmp3);
else