FIX PR2794. Make sure SIGN_EXTEND_INREG nodes introduced by LegalizeSetCCOperands...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57460 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 114ea350297dae21eba6215cd6163c7a226e2dcb..6e7aa1964ac7964e98293a5f047302745bd5ebef 100644 (file)
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -4671,6 +4671,8 @@ void SelectionDAGLegalize::LegalizeSetCCOperands(SDValue &LHS,
                            DAG.getValueType(VT));
         Tmp2 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp2,
                            DAG.getValueType(VT));
+        Tmp1 = LegalizeOp(Tmp1); // Relegalize new nodes.
+        Tmp2 = LegalizeOp(Tmp2); // Relegalize new nodes.
         break;
       }
     }
@@ -5403,7 +5405,8 @@ ExpandIntToFP(bool isSigned, MVT DestTy, SDValue Source) {
                                        DestTy.getVectorNumElements() / 2);
     SDValue LoResult = LegalizeINT_TO_FP(SDValue(), isSigned, SplitDestTy, Lo);
     SDValue HiResult = LegalizeINT_TO_FP(SDValue(), isSigned, SplitDestTy, Hi);
-    return LegalizeOp(DAG.getNode(ISD::CONCAT_VECTORS, DestTy, LoResult, HiResult));
+    return LegalizeOp(DAG.getNode(ISD::CONCAT_VECTORS, DestTy, LoResult,
+                                  HiResult));
   }
 
   // Special case for i32 source to take advantage of UINTTOFP_I32_F32, etc.

diff --git a/test/CodeGen/Mips/2008-10-13-LegalizerBug.ll b/test/CodeGen/Mips/2008-10-13-LegalizerBug.ll
new file mode 100644 (file)
index 0000000..783850a
--- /dev/null
+++ b/test/CodeGen/Mips/2008-10-13-LegalizerBug.ll
@@ -0,0 +1,29 @@
+; RUN: llvm-as < %s | llc -march=mips
+; PR2794
+
+define i32 @main(i8*) nounwind {
+entry:
+        br label %continue.outer
+
+continue.outer:         ; preds = %case4, %entry
+        %p.0.ph.rec = phi i32 [ 0, %entry ], [ %indvar.next, %case4 ]          ; <i32> [#uses=2]
+        %p.0.ph = getelementptr i8* %0, i32 %p.0.ph.rec         ; <i8*> [#uses=1]
+        %1 = load i8* %p.0.ph           ; <i8> [#uses=1]
+        switch i8 %1, label %infloop [
+                i8 0, label %return.split
+                i8 76, label %case4
+                i8 108, label %case4
+                i8 104, label %case4
+                i8 42, label %case4
+        ]
+
+case4:          ; preds = %continue.outer, %continue.outer, %continue.outer, %continue.outer
+        %indvar.next = add i32 %p.0.ph.rec, 1           ; <i32> [#uses=1]
+        br label %continue.outer
+
+return.split:           ; preds = %continue.outer
+        ret i32 0
+
+infloop:                ; preds = %infloop, %continue.outer
+        br label %infloop
+}