rk2928: clock: fix dump_clock for pll
author黄涛 <huangtao@rock-chips.com>
Tue, 9 Oct 2012 08:53:02 +0000 (16:53 +0800)
committer黄涛 <huangtao@rock-chips.com>
Tue, 9 Oct 2012 08:53:24 +0000 (16:53 +0800)
arch/arm/mach-rk2928/clock_data.c

index ca15655c5591952f9f1a799bff3d8a23e518a8ca..dd1932c8f78f52f667b68b07a66aeb2dd14c988f 100644 (file)
@@ -2291,9 +2291,9 @@ static void dump_clock(struct seq_file *s, struct clk *clk, int deep,const struc
                u32 pll_mode;
                u32 pll_id=clk->pll->id;
                pll_mode=cru_readl(CRU_MODE_CON)&PLL_MODE_MSK(pll_id);
-               if(pll_mode==PLL_MODE_SLOW(pll_id))
+               if (pll_mode == (PLL_MODE_SLOW(pll_id) & PLL_MODE_MSK(pll_id)))
                        seq_printf(s, "slow   ");
-               else if(pll_mode==PLL_MODE_NORM(pll_id))
+               else if (pll_mode == (PLL_MODE_NORM(pll_id) & PLL_MODE_MSK(pll_id)))
                        seq_printf(s, "normal ");
                if(cru_readl(PLL_CONS(pll_id,3)) & PLL_BYPASS) 
                        seq_printf(s, "bypass ");