correct bugs for 'cpu hclk and pclk is 1:1

diff --git a/arch/arm/mach-rk30/clock_data.c b/arch/arm/mach-rk30/clock_data.c
old mode 100644 (file)
new mode 100755 (executable)
index 4f84d7f..fe432f0
--- a/arch/arm/mach-rk30/clock_data.c
+++ b/arch/arm/mach-rk30/clock_data.c
@@ -981,6 +981,10 @@ static int arm_pll_clk_set_rate(struct clk *clk, unsigned long rate)
        {       
                ps_clksel1=force_cpu_hpclk_11(ps->clksel1);
        }
+       else
+       {
+               ps_clksel1=ps->clksel1;
+       }
        //return form slow
        //cru_writel(PLL_MODE_NORM(APLL_ID), CRU_MODE_CON);
        //a/h/p clk sel