ARM: sunxi: dt: Add i2c controller nodes to the DTSI

The Allwinner A10 and A13 both have 3 i2c controller embedded.
Add those to the common sunxi dtsi.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tomasz Figa <tomasz.figa@gmail.com>

diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 9b3c99c838926e40bd315724a3a42364513cbaa3..ba15178f04ba926629f342f509109c093e10c120 100644 (file)
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -294,5 +294,32 @@
                        clocks = <&apb1_gates 23>;
                        status = "disabled";
                };
+
+               i2c0: i2c@01c2ac00 {
+                       compatible = "allwinner,sun4i-i2c";
+                       reg = <0x01c2ac00 0x400>;
+                       interrupts = <7>;
+                       clocks = <&apb1_gates 0>;
+                       clock-frequency = <100000>;
+                       status = "disabled";
+               };
+
+               i2c1: i2c@01c2b000 {
+                       compatible = "allwinner,sun4i-i2c";
+                       reg = <0x01c2b000 0x400>;
+                       interrupts = <8>;
+                       clocks = <&apb1_gates 1>;
+                       clock-frequency = <100000>;
+                       status = "disabled";
+               };
+
+               i2c2: i2c@01c2b400 {
+                       compatible = "allwinner,sun4i-i2c";
+                       reg = <0x01c2b400 0x400>;
+                       interrupts = <9>;
+                       clocks = <&apb1_gates 2>;
+                       clock-frequency = <100000>;
+                       status = "disabled";
+               };
        };
 };

diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index f34db19d17d7266beed5a383f7bd1937e6c21804..31ebfd721195b6517968e766825edafed3893257 100644 (file)
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -217,5 +217,32 @@
                        clocks = <&apb1_gates 19>;
                        status = "disabled";
                };
+
+               i2c0: i2c@01c2ac00 {
+                       compatible = "allwinner,sun4i-i2c";
+                       reg = <0x01c2ac00 0x400>;
+                       interrupts = <7>;
+                       clocks = <&apb1_gates 0>;
+                       clock-frequency = <100000>;
+                       status = "disabled";
+               };
+
+               i2c1: i2c@01c2b000 {
+                       compatible = "allwinner,sun4i-i2c";
+                       reg = <0x01c2b000 0x400>;
+                       interrupts = <8>;
+                       clocks = <&apb1_gates 1>;
+                       clock-frequency = <100000>;
+                       status = "disabled";
+               };
+
+               i2c2: i2c@01c2b400 {
+                       compatible = "allwinner,sun4i-i2c";
+                       reg = <0x01c2b400 0x400>;
+                       interrupts = <9>;
+                       clocks = <&apb1_gates 2>;
+                       clock-frequency = <100000>;
+                       status = "disabled";
+               };
        };
 };