[ARM] tegra: dma: expose TEGRA_DMA_MAX_TRANSFER_SIZE, fix typo
authorIliyan Malchev <malchev@google.com>
Thu, 21 Oct 2010 23:48:37 +0000 (16:48 -0700)
committerIliyan Malchev <malchev@google.com>
Tue, 26 Oct 2010 18:11:10 +0000 (11:11 -0700)
NV_DMA_MAX_TRASFER_SIZE --> TEGRA_DMA_MAX_TRANSFER_SIZE

Signed-off-by: Iliyan Malchev <malchev@google.com>
arch/arm/mach-tegra/dma.c
arch/arm/mach-tegra/include/mach/dma.h

index 8da59aa855ffc74f16be68cda12847cd38d7f80b..ffba4441a99b8cb8ba2ec3b6ed82f4b823771366 100644 (file)
 #define TEGRA_SYSTEM_DMA_CH_MAX        \
        (TEGRA_SYSTEM_DMA_CH_NR - TEGRA_SYSTEM_DMA_AVP_CH_NUM - 1)
 
-#define NV_DMA_MAX_TRASFER_SIZE 0x10000
-
 const unsigned int ahb_addr_wrap_table[8] = {
        0, 32, 64, 128, 256, 512, 1024, 2048
 };
@@ -326,7 +324,7 @@ int tegra_dma_enqueue_req(struct tegra_dma_channel *ch,
        unsigned long irq_flags;
        int start_dma = 0;
 
-       if (req->size > NV_DMA_MAX_TRASFER_SIZE ||
+       if (req->size > TEGRA_DMA_MAX_TRANSFER_SIZE ||
                req->source_addr & 0x3 || req->dest_addr & 0x3) {
                pr_err("Invalid DMA request for channel %d\n", ch->id);
                return -EINVAL;
index 81e62782bac7ceba74c5817b6dfc24e9975fe4f4..243050693eec775a4b943a8a8044b042240facab 100644 (file)
@@ -56,6 +56,8 @@ struct tegra_dma_channel;
 #define TEGRA_DMA_REQ_SEL_OWR                  25
 #define TEGRA_DMA_REQ_SEL_INVALID              31
 
+#define TEGRA_DMA_MAX_TRANSFER_SIZE            0x10000
+
 enum tegra_dma_mode {
        TEGRA_DMA_SHARED = 1,
        TEGRA_DMA_MODE_CONTINUOUS = 2,