fix display abnormal when system exit sleep mode
authorhcy <hcy@rock-chips.com>
Thu, 24 Apr 2014 03:44:41 +0000 (11:44 +0800)
committerhcy <hcy@rock-chips.com>
Thu, 24 Apr 2014 03:44:41 +0000 (11:44 +0800)
arch/arm/mach-rockchip/ddr_rk32.c

index 31383a5a4976b5546541d3122d4a2cf04f7ef2be..13570674e0dbc6cfaf449206f612aa81b1e1c32e 100755 (executable)
@@ -32,7 +32,7 @@ typedef uint32_t uint32;
 
 #define DDR3_DDR2_ODT_DISABLE_FREQ    (333)
 #define DDR3_DDR2_DLL_DISABLE_FREQ    (333)
-#define SR_IDLE                       (0x1)   //unit:32*DDR clk cycle, and 0 for disable auto self-refresh
+#define SR_IDLE                       (0x3)   //unit:32*DDR clk cycle, and 0 for disable auto self-refresh
 #define PD_IDLE                       (0X40)  //unit:DDR clk cycle, and 0 for disable auto power-down
 
 //#if (DDR3_DDR2_ODT_DISABLE_FREQ > DDR3_DDR2_DLL_DISABLE_FREQ)