if (regs == 2) {
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder));
}
- if (Rm == 0xD) {
+ if (Rm != 0xF) {
CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder));
}
CHECK(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder));
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder));
- if (Rm == 0xD) {
+ if (Rm != 0xF) {
CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder));
}
CHECK(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder));
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder));
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder));
- if (Rm == 0xD) {
+ if (Rm != 0xF) {
CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder));
}
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder));
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder));
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+3*inc)%32, Address, Decoder));
- if (Rm == 0xD) {
+ if (Rm != 0xF) {
CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder));
}
# CHECK: vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64]
0x4f 0x1b 0xc0 0xf4
# CHECK: vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0]
+
+0x0 0xc 0xa0 0xf4
+# CHECK: vld1.8 {d0[]}, [r0], r0
+