Handle getresult instructions in different basic blocks

from their aggregate operands by moving the getresult
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48657 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Transforms/Scalar/CodeGenPrepare.cpp b/lib/Transforms/Scalar/CodeGenPrepare.cpp
index 8762d3dd1bcb57fe13ed04952c7c33ad00a706e8..43251c344f8757ec92132a476322fa85d61af900 100644 (file)
--- a/lib/Transforms/Scalar/CodeGenPrepare.cpp
+++ b/lib/Transforms/Scalar/CodeGenPrepare.cpp
@@ -1127,6 +1127,15 @@ bool CodeGenPrepare::OptimizeBlock(BasicBlock &BB) {
             // Sink address computing for memory operands into the block.
             MadeChange |= OptimizeInlineAsmInst(I, &(*CI), SunkAddrs);
         }
+    } else if (GetResultInst *GRI = dyn_cast<GetResultInst>(I)) {
+      // Ensure that all getresult instructions live in the same basic block
+      // as their associated struct-value instructions. Codegen requires
+      // this, as lowering only works on one basic block at a time.
+      if (Instruction *Agg = dyn_cast<Instruction>(GRI->getAggregateValue())) {
+        BasicBlock *AggBB = Agg->getParent();
+        if (AggBB != GRI->getParent())
+          GRI->moveBefore(AggBB->getTerminator());
+      }
     }
   }
     

diff --git a/test/CodeGen/X86/multiple-return-values-cross-block.ll b/test/CodeGen/X86/multiple-return-values-cross-block.ll
new file mode 100644 (file)
index 0000000..f632b87
--- /dev/null
+++ b/test/CodeGen/X86/multiple-return-values-cross-block.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llc -march=x86
+
+declare {x86_fp80, x86_fp80} @test()
+
+define void @call2(x86_fp80 *%P1, x86_fp80 *%P2) {
+  %a = call {x86_fp80,x86_fp80} @test()
+  %b = getresult {x86_fp80,x86_fp80} %a, 1
+  store x86_fp80 %b, x86_fp80* %P1
+br label %L
+
+L:
+  %c = getresult {x86_fp80,x86_fp80} %a, 0
+  store x86_fp80 %c, x86_fp80* %P2
+  ret void
+}