UPSTREAM: clk: rockchip: add the new clock ids for RK3228 VOP

There are four clocks that vop module would need to operate:
    DCLK_VOP,  HCLK_VOP,  SCLK_VOP,  ACLK_VOP,

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
v4.8-shared/clkids commit 31b1fed36eb56ae8bd25af42ad1625c4110615eb)

Change-Id: Iea57109b85928c4139283e366ce5d60430e8984b
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h
index cd2e06bd6103f504f30cdcd385d6fec270860331..9ce3da8b51c33e34f54a6221bdb5c04d0c368c38 100644 (file)
--- a/include/dt-bindings/clock/rk3228-cru.h
+++ b/include/dt-bindings/clock/rk3228-cru.h
@@ -50,10 +50,15 @@
 #define SCLK_SDMMC_SAMPLE      118
 #define SCLK_SDIO_SAMPLE       119
 #define SCLK_EMMC_SAMPLE       121
+#define SCLK_VOP               122
+
+/* dclk gates */
+#define DCLK_VOP               190
 
 /* aclk gates */
 #define ACLK_DMAC              194
 #define ACLK_PERI              210
+#define ACLK_VOP               211
 
 /* pclk gates */
 #define PCLK_GPIO0             320
@@ -75,6 +80,7 @@
 #define PCLK_PERI              363
 
 /* hclk gates */
+#define HCLK_VOP               452
 #define HCLK_NANDC             453
 #define HCLK_SDMMC             456
 #define HCLK_SDIO              457