Added CommuteChangesDestination(). This returns true if commuting the specified

machine instr will change its definition register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47166 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index f9b361f59b98c6609f2d2bde17e5fae99949cb5f..75260878dd21f18ff2af865fac4982937b87c3f5 100644 (file)
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -149,6 +149,14 @@ public:
   ///
   virtual MachineInstr *commuteInstruction(MachineInstr *MI) const = 0;
 
+  /// CommuteChangesDestination - Return true if commuting the specified
+  /// instruction will also changes the destination operand. Also return the
+  /// current operand index of the would be new destination register by
+  /// reference. This can happen when the commutable instruction is also a
+  /// two-address instruction.
+  virtual bool CommuteChangesDestination(MachineInstr *MI,
+                                         unsigned &OpIdx) const = 0;
+
   /// AnalyzeBranch - Analyze the branching code at the end of MBB, returning
   /// true if it cannot be understood (e.g. it's a switch dispatch or isn't
   /// implemented for a target).  Upon success, this returns false and returns
@@ -384,6 +392,8 @@ protected:
   : TargetInstrInfo(desc, NumOpcodes) {}
 public:
   virtual MachineInstr *commuteInstruction(MachineInstr *MI) const;
+  virtual bool CommuteChangesDestination(MachineInstr *MI,
+                                         unsigned &OpIdx) const;
   virtual bool PredicateInstruction(MachineInstr *MI,
                               const std::vector<MachineOperand> &Pred) const;
   

diff --git a/lib/CodeGen/TargetInstrInfoImpl.cpp b/lib/CodeGen/TargetInstrInfoImpl.cpp
index 4f6c1237e9f8889ab5533a6309543436e756bb85..ceec82b307880d28bcfa401353e4c364ffd8ef5f 100644 (file)
--- a/lib/CodeGen/TargetInstrInfoImpl.cpp
+++ b/lib/CodeGen/TargetInstrInfoImpl.cpp
@@ -39,8 +39,28 @@ MachineInstr *TargetInstrInfoImpl::commuteInstruction(MachineInstr *MI) const {
   return MI;
 }
 
+/// CommuteChangesDestination - Return true if commuting the specified
+/// instruction will also changes the destination operand. Also return the
+/// current operand index of the would be new destination register by
+/// reference. This can happen when the commutable instruction is also a
+/// two-address instruction.
+bool TargetInstrInfoImpl::CommuteChangesDestination(MachineInstr *MI,
+                                                    unsigned &OpIdx) const{
+  assert(MI->getOperand(1).isRegister() && MI->getOperand(2).isRegister() &&
+         "This only knows how to commute register operands so far");
+  if (MI->getOperand(0).getReg() == MI->getOperand(1).getReg()) {
+    // Must be two address instruction!
+    assert(MI->getDesc().getOperandConstraint(0, TOI::TIED_TO) &&
+           "Expecting a two-address instruction!");
+    OpIdx = 2;
+    return true;
+  }
+  return false;
+}
+
+
 bool TargetInstrInfoImpl::PredicateInstruction(MachineInstr *MI,
-                                               const std::vector<MachineOperand> &Pred) const {
+                                const std::vector<MachineOperand> &Pred) const {
   bool MadeChange = false;
   const TargetInstrDesc &TID = MI->getDesc();
   if (!TID.isPredicable())