Add COND_BRANCH pseudo instruction, patch by Nate Begeman.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15283 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index 02e33f327c09d5b3d64bebcaf3acb2673f5004ef..0a73c66036107c22234d96e0ac51435b5ee83831 100644 (file)
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -1297,6 +1297,7 @@ def ANDC : PPC32InstPattern5 <"andc", Gpr, Gpr, Gpr, 31, 120, 0, 0>;
 def ANDCo : PPC32InstPattern5 <"andc.", Gpr, Gpr, Gpr, 31, 121, 0, 0>;
 
 let isBranch = 1, isTerminator = 1 in {
+  def COND_BRANCH : PPC32InstPatternPseudo<"COND_BRANCH", Pseudo>;
   def B : PPC32InstPattern6 <"b", PCRelimm24, 18, 0, 0, 0>;
   def BA : PPC32InstPattern6 <"ba", Imm24, 18, 0, 0, 0>;
   def BC : PPC32InstPattern7 <"bc", Imm5, Imm5, PCRelimm14, 16, 0, 0, 0>;