during Post RA scheduling in X86,
until the X86 target is changed to properly set up
post RA liveness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154874
91177308-0d34-0410-b5e6-
96231b3b80d8
CodeGenOpt::Level OptLevel,
TargetSubtargetInfo::AntiDepBreakMode& Mode,
RegClassVector& CriticalPathRCs) const {
- Mode = TargetSubtargetInfo::ANTIDEP_CRITICAL;
+ //TODO: change back to ANTIDEP_CRITICAL when the
+ // X86 subtarget properly sets up post RA liveness.
+ Mode = TargetSubtargetInfo::ANTIDEP_NONE;
CriticalPathRCs.clear();
return PostRAScheduler && OptLevel >= CodeGenOpt::Default;
}