AMDGPU: Add readonly to InstrMapping functions
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 24 Sep 2015 07:51:23 +0000 (07:51 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 24 Sep 2015 07:51:23 +0000 (07:51 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248474 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AMDGPU/SIInstrInfo.h

index 9b4ba029122aa483bdb6373545acd8f521cc0147..272b65104a8398dd91285f3c61a9f96afd5c2004 100644 (file)
@@ -113,6 +113,8 @@ public:
   // register.  If there is no hardware instruction that can store to \p
   // DstRC, then AMDGPU::COPY is returned.
   unsigned getMovOpcode(const TargetRegisterClass *DstRC) const;
+
+  LLVM_READONLY
   int commuteOpcode(const MachineInstr &MI) const;
 
   MachineInstr *commuteInstruction(MachineInstr *MI,
@@ -348,13 +350,25 @@ public:
 };
 
 namespace AMDGPU {
-
+  LLVM_READONLY
   int getVOPe64(uint16_t Opcode);
+
+  LLVM_READONLY
   int getVOPe32(uint16_t Opcode);
+
+  LLVM_READONLY
   int getCommuteRev(uint16_t Opcode);
+
+  LLVM_READONLY
   int getCommuteOrig(uint16_t Opcode);
+
+  LLVM_READONLY
   int getAddr64Inst(uint16_t Opcode);
+
+  LLVM_READONLY
   int getAtomicRetOp(uint16_t Opcode);
+
+  LLVM_READONLY
   int getAtomicNoRetOp(uint16_t Opcode);
 
   const uint64_t RSRC_DATA_FORMAT = 0xf00000000000LL;