bnx2x: Fix BCM84823 LED behavior
authorYaniv Rosner <yanivr@broadcom.com>
Tue, 18 Jan 2011 04:33:47 +0000 (04:33 +0000)
committerDavid S. Miller <davem@davemloft.net>
Wed, 19 Jan 2011 00:10:39 +0000 (16:10 -0800)
Fix BCM84823 LED behavior which may show on some systems

Signed-off-by: Yaniv Rosner <yanivr@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/bnx2x/bnx2x_link.c
drivers/net/bnx2x/bnx2x_reg.h

index f5fd33ea09768e0a067c9371945c9e0648b81069..bb1c81156d0f1e80ee0ea266fa510741cfb3c58c 100644 (file)
@@ -5972,10 +5972,26 @@ static void bnx2x_848xx_set_led(struct bnx2x *bp,
                         MDIO_PMA_REG_8481_LED2_MASK,
                         0x18);
 
+       /* Select activity source by Tx and Rx, as suggested by PHY AE */
        bnx2x_cl45_write(bp, phy,
                         MDIO_PMA_DEVAD,
                         MDIO_PMA_REG_8481_LED3_MASK,
-                        0x0040);
+                        0x0006);
+
+       /* Select the closest activity blink rate to that in 10/100/1000 */
+       bnx2x_cl45_write(bp, phy,
+                       MDIO_PMA_DEVAD,
+                       MDIO_PMA_REG_8481_LED3_BLINK,
+                       0);
+
+       bnx2x_cl45_read(bp, phy,
+                       MDIO_PMA_DEVAD,
+                       MDIO_PMA_REG_84823_CTL_LED_CTL_1, &val);
+       val |= MDIO_PMA_REG_84823_LED3_STRETCH_EN; /* stretch_en for LED3*/
+
+       bnx2x_cl45_write(bp, phy,
+                        MDIO_PMA_DEVAD,
+                        MDIO_PMA_REG_84823_CTL_LED_CTL_1, val);
 
        /* 'Interrupt Mask' */
        bnx2x_cl45_write(bp, phy,
index 38ef7ca9f21dc110acff358e2a362d8d07741069..73efc9bbfe7c11b346cc353ff9b5b9168b50e259 100644 (file)
@@ -6194,7 +6194,11 @@ Theotherbitsarereservedandshouldbezero*/
 #define MDIO_CTL_REG_84823_MEDIA_PRIORITY_COPPER       0x0000
 #define MDIO_CTL_REG_84823_MEDIA_PRIORITY_FIBER                0x0100
 #define MDIO_CTL_REG_84823_MEDIA_FIBER_1G                      0x1000
+#define MDIO_CTL_REG_84823_USER_CTRL_REG               0x4005
+#define MDIO_CTL_REG_84823_USER_CTRL_CMS               0x0080
 
+#define MDIO_PMA_REG_84823_CTL_LED_CTL_1               0xa8e3
+#define MDIO_PMA_REG_84823_LED3_STRETCH_EN             0x0080
 
 #define IGU_FUNC_BASE                  0x0400