ARM: imx: use __iomem pointers for MMIO

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

This found a bug in mach-armadillo5x0.c, where we attempt mmio
on the MXC_CCM_RCSR address that is currently defined to 0xc
and consequently causes an illegal address access.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>

diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index 5d08533ab2c77d50109c670dc071063c9c0da34c..4b9b7aae7a9bc8848ff20210dab125a29889d206 100644 (file)
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -259,13 +259,13 @@ static void __init kzm_board_init(void)
  */
 static struct map_desc kzm_io_desc[] __initdata = {
        {
-               .virtual        = MX31_CS4_BASE_ADDR_VIRT,
+               .virtual        = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
                .pfn            = __phys_to_pfn(MX31_CS4_BASE_ADDR),
                .length         = MX31_CS4_SIZE,
                .type           = MT_DEVICE
        },
        {
-               .virtual        = MX31_CS5_BASE_ADDR_VIRT,
+               .virtual        = (unsigned long)MX31_CS5_BASE_ADDR_VIRT,
                .pfn            = __phys_to_pfn(MX31_CS5_BASE_ADDR),
                .length         = MX31_CS5_SIZE,
                .type           = MT_DEVICE

diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index d37f4809c5565abacb594f7693991ce726412092..e774b07f48d33c70c0a678f3547fc8d1962d15bf 100644 (file)
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -540,7 +540,7 @@ static void __init mxc_init_audio(void)
  */
 static struct map_desc mx31ads_io_desc[] __initdata = {
        {
-               .virtual        = MX31_CS4_BASE_ADDR_VIRT,
+               .virtual        = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
                .pfn            = __phys_to_pfn(MX31_CS4_BASE_ADDR),
                .length         = CS4_CS8900_MMIO_START,
                .type           = MT_DEVICE

diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index c8785b39eaed20432166db3a0d24b49a4f416bc0..ef57cff5abfbf8bd72607e23395963bbe5d4d895 100644 (file)
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -207,7 +207,7 @@ static struct platform_device physmap_flash_device = {
  */
 static struct map_desc mx31lite_io_desc[] __initdata = {
        {
-               .virtual = MX31_CS4_BASE_ADDR_VIRT,
+               .virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
                .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
                .length = MX31_CS4_SIZE,
                .type = MT_DEVICE

diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index dbced61d9fdae0a58f0932c4c8f75a4aee325cd6..ee9b1f9215df78fd859e4274a3e31bde736c4b84 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -76,7 +76,7 @@
 #define MX31_RTIC_BASE_ADDR                    (MX31_AIPS2_BASE_ADDR + 0xec000)
 
 #define MX31_ROMP_BASE_ADDR            0x60000000
-#define MX31_ROMP_BASE_ADDR_VIRT       0xfc500000
+#define MX31_ROMP_BASE_ADDR_VIRT       IOMEM(0xfc500000)
 #define MX31_ROMP_SIZE                 SZ_1M
 
 #define MX31_AVIC_BASE_ADDR            0x68000000
@@ -92,11 +92,11 @@
 #define MX31_CS3_BASE_ADDR             0xb2000000
 
 #define MX31_CS4_BASE_ADDR             0xb4000000
-#define MX31_CS4_BASE_ADDR_VIRT                0xf6000000
+#define MX31_CS4_BASE_ADDR_VIRT                IOMEM(0xf6000000)
 #define MX31_CS4_SIZE                  SZ_32M
 
 #define MX31_CS5_BASE_ADDR             0xb6000000
-#define MX31_CS5_BASE_ADDR_VIRT                0xf8000000
+#define MX31_CS5_BASE_ADDR_VIRT                IOMEM(0xf8000000)
 #define MX31_CS5_SIZE                  SZ_32M
 
 #define MX31_X_MEMC_BASE_ADDR          0xb8000000