instead of fixed size arrays, so that increasing FirstVirtualRegister to 16K
won't cause a compile time performance regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109330
91177308-0d34-0410-b5e6-
96231b3b80d8
ScheduleDAGInstrs::ScheduleDAGInstrs(MachineFunction &mf,
const MachineLoopInfo &mli,
const MachineDominatorTree &mdt)
- : ScheduleDAG(mf), MLI(mli), MDT(mdt), LoopRegs(MLI, MDT) {
+ : ScheduleDAG(mf), MLI(mli), MDT(mdt), Defs(TRI->getNumRegs()),
+ Uses(TRI->getNumRegs()), LoopRegs(MLI, MDT) {
MFI = mf.getFrameInfo();
DbgValueVec.clear();
}
/// are as we iterate upward through the instructions. This is allocated
/// here instead of inside BuildSchedGraph to avoid the need for it to be
/// initialized and destructed for each block.
- std::vector<SUnit *> Defs[TargetRegisterInfo::FirstVirtualRegister];
- std::vector<SUnit *> Uses[TargetRegisterInfo::FirstVirtualRegister];
+ std::vector<std::vector<SUnit *> > Defs;
+ std::vector<std::vector<SUnit *> > Uses;
/// DbgValueVec - Remember DBG_VALUEs that refer to a particular
/// register.