{ CR240, 0x57 }, { CR9, 0xe0 },
};
+static const struct zd_ioreq16 ioreqs_init_al2230s[] = {
+ { CR47, 0x1e }, /* MARK_002 */
+ { CR106, 0x22 },
+ { CR107, 0x2a }, /* MARK_002 */
+ { CR109, 0x13 }, /* MARK_002 */
+ { CR118, 0xf8 }, /* MARK_002 */
+ { CR119, 0x12 }, { CR122, 0xe0 },
+ { CR128, 0x10 }, /* MARK_001 from 0xe->0x10 */
+ { CR129, 0x0e }, /* MARK_001 from 0xd->0x0e */
+ { CR130, 0x10 }, /* MARK_001 from 0xb->0x0d */
+};
+
static int zd1211b_al2230_finalize_rf(struct zd_chip *chip)
{
int r;
int r;
struct zd_chip *chip = zd_rf_to_chip(rf);
- static const struct zd_ioreq16 ioreqs[] = {
+ static const struct zd_ioreq16 ioreqs_init[] = {
{ CR15, 0x20 }, { CR23, 0x40 }, { CR24, 0x20 },
{ CR26, 0x11 }, { CR28, 0x3e }, { CR29, 0x00 },
{ CR44, 0x33 }, { CR106, 0x2a }, { CR107, 0x1a },
{ CR119, 0x10 }, { CR120, 0x4f }, { CR121, 0x77 },
{ CR122, 0xe0 }, { CR137, 0x88 }, { CR252, 0xff },
{ CR253, 0xff },
+ };
- /* These following happen separately in the vendor driver */
- { },
-
+ static const struct zd_ioreq16 ioreqs_pll[] = {
/* shdnb(PLL_ON)=0 */
{ CR251, 0x2f },
/* shdnb(PLL_ON)=1 */
{ CR138, 0x28 }, { CR203, 0x06 },
};
- static const u32 rv[] = {
+ static const u32 rv1[] = {
/* Channel 1 */
0x03f790,
0x033331,
0x0b3331,
0x03b812,
0x00fff3,
+ };
+
+ static const u32 rv2[] = {
0x000da4,
0x0f4dc5, /* fix freq shift, 0x04edc5 */
0x0805b6,
0x0bdffc,
0x00000d,
0x00500f,
+ };
- /* These writes happen separately in the vendor driver */
+ static const u32 rv3[] = {
0x00d00f,
0x004c0f,
0x00540f,
0x00500f,
};
- r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
+ r = zd_iowrite16a_locked(chip, ioreqs_init, ARRAY_SIZE(ioreqs_init));
if (r)
return r;
- r = zd_rfwritev_locked(chip, rv, ARRAY_SIZE(rv), RF_RV_BITS);
+ if (chip->al2230s_bit) {
+ r = zd_iowrite16a_locked(chip, ioreqs_init_al2230s,
+ ARRAY_SIZE(ioreqs_init_al2230s));
+ if (r)
+ return r;
+ }
+
+ r = zd_rfwritev_locked(chip, rv1, ARRAY_SIZE(rv1), RF_RV_BITS);
+ if (r)
+ return r;
+
+ /* improve band edge for AL2230S */
+ if (chip->al2230s_bit)
+ r = zd_rfwrite_locked(chip, 0x000824, RF_RV_BITS);
+ else
+ r = zd_rfwrite_locked(chip, 0x0005a4, RF_RV_BITS);
+ if (r)
+ return r;
+
+ r = zd_rfwritev_locked(chip, rv2, ARRAY_SIZE(rv2), RF_RV_BITS);
+ if (r)
+ return r;
+
+ r = zd_iowrite16a_locked(chip, ioreqs_pll, ARRAY_SIZE(ioreqs_pll));
+ if (r)
+ return r;
+
+ r = zd_rfwritev_locked(chip, rv3, ARRAY_SIZE(rv3), RF_RV_BITS);
if (r)
return r;
0x481dc0,
0xcfff00,
0x25a000,
+ };
+ static const u32 rv2[] = {
/* To improve AL2230 yield, improve phase noise, 4713 */
0x25a000,
0xa3b2f0,
{ CR251, 0x7f }, /* shdnb(PLL_ON)=1 */
};
- static const u32 rv2[] = {
+ static const u32 rv3[] = {
/* To improve AL2230 yield, 4713 */
0xf01b00,
0xf01e00,
r = zd_iowrite16a_locked(chip, ioreqs1, ARRAY_SIZE(ioreqs1));
if (r)
return r;
+
+ if (chip->al2230s_bit) {
+ r = zd_iowrite16a_locked(chip, ioreqs_init_al2230s,
+ ARRAY_SIZE(ioreqs_init_al2230s));
+ if (r)
+ return r;
+ }
+
r = zd_rfwritev_cr_locked(chip, zd1211b_al2230_table[0], 3);
if (r)
return r;
r = zd_rfwritev_cr_locked(chip, rv1, ARRAY_SIZE(rv1));
if (r)
return r;
- r = zd_iowrite16a_locked(chip, ioreqs2, ARRAY_SIZE(ioreqs2));
+
+ if (chip->al2230s_bit)
+ r = zd_rfwrite_locked(chip, 0x241000, RF_RV_BITS);
+ else
+ r = zd_rfwrite_locked(chip, 0x25a000, RF_RV_BITS);
if (r)
return r;
+
r = zd_rfwritev_cr_locked(chip, rv2, ARRAY_SIZE(rv2));
+ if (r)
+ return r;
+ r = zd_iowrite16a_locked(chip, ioreqs2, ARRAY_SIZE(ioreqs2));
+ if (r)
+ return r;
+ r = zd_rfwritev_cr_locked(chip, rv3, ARRAY_SIZE(rv3));
if (r)
return r;
r = zd_iowrite16a_locked(chip, ioreqs3, ARRAY_SIZE(ioreqs3));
{
struct zd_chip *chip = zd_rf_to_chip(rf);
- if (chip->al2230s_bit) {
- dev_err(zd_chip_dev(chip), "AL2230S devices are not yet "
- "supported by this driver.\n");
- return -ENODEV;
- }
-
rf->switch_radio_off = al2230_switch_radio_off;
if (chip->is_zd1211b) {
rf->init_hw = zd1211b_al2230_init_hw;