powerpc/fsl: Updated device trees for platforms with corenet version 2

Updated the device trees according to the corenet-cf
binding definition.

Signed-off-by: Diana Craciun <Diana.Craciun@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>

diff --git a/arch/powerpc/boot/dts/b4860emu.dts b/arch/powerpc/boot/dts/b4860emu.dts
index 7290021f2dfc0361a84913e9f4a95634ab3854ae..85646b4f96e154d3356fc519068529d8514f5020 100644 (file)
--- a/arch/powerpc/boot/dts/b4860emu.dts
+++ b/arch/powerpc/boot/dts/b4860emu.dts
@@ -61,21 +61,25 @@
                        device_type = "cpu";
                        reg = <0 1>;
                        next-level-cache = <&L2>;
+                       fsl,portid-mapping = <0x80000000>;
                };
                cpu1: PowerPC,e6500@2 {
                        device_type = "cpu";
                        reg = <2 3>;
                        next-level-cache = <&L2>;
+                       fsl,portid-mapping = <0x80000000>;
                };
                cpu2: PowerPC,e6500@4 {
                        device_type = "cpu";
                        reg = <4 5>;
                        next-level-cache = <&L2>;
+                       fsl,portid-mapping = <0x80000000>;
                };
                cpu3: PowerPC,e6500@6 {
                        device_type = "cpu";
                        reg = <6 7>;
                        next-level-cache = <&L2>;
+                       fsl,portid-mapping = <0x80000000>;
                };
        };
 };
@@ -157,7 +161,7 @@
        };
 
        corenet-cf@18000 {
-               compatible = "fsl,b4-corenet-cf";
+               compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
                reg = <0x18000 0x1000>;
                interrupts = <16 2 1 0>;
                fsl,ccf-num-csdids = <32>;
@@ -167,6 +171,7 @@
        iommu@20000 {
                compatible = "fsl,pamu-v1.0", "fsl,pamu";
                reg = <0x20000 0x4000>;
+               fsl,portid-mapping = <0x8000>;
                #address-cells = <1>;
                #size-cells = <1>;
                interrupts = <

diff --git a/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
index 60566f9927be576de6797accfc578f6b1e5fd7ad..d67894459ac8dc00ec7d9c5c793af7f44271387c 100644 (file)
--- a/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
@@ -76,10 +76,6 @@
                compatible = "fsl,b4420-l3-cache-controller", "cache";
        };
 
-       corenet-cf@18000 {
-               compatible = "fsl,b4420-corenet-cf";
-       };
-
        guts: global-utilities@e0000 {
                compatible = "fsl,b4420-device-config", "fsl,qoriq-device-config-2.0";
        };

diff --git a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
index 2419731c2c5443b35c1f6edde0f89808fc7bbef6..338af7e39dd9587d867a3c59ae11192ed1c7f3f1 100644 (file)
--- a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
@@ -66,12 +66,14 @@
                        reg = <0 1>;
                        clocks = <&mux0>;
                        next-level-cache = <&L2>;
+                       fsl,portid-mapping = <0x80000000>;
                };
                cpu1: PowerPC,e6500@2 {
                        device_type = "cpu";
                        reg = <2 3>;
                        clocks = <&mux0>;
                        next-level-cache = <&L2>;
+                       fsl,portid-mapping = <0x80000000>;
                };
        };
 };

diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
index cbc354b05117344342bab0d839749e19a0f2b832..582381dba1d76dede51611a110ed642a9c990330 100644 (file)
--- a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
@@ -120,10 +120,6 @@
                compatible = "fsl,b4860-l3-cache-controller", "cache";
        };
 
-       corenet-cf@18000 {
-               compatible = "fsl,b4860-corenet-cf";
-       };
-
        guts: global-utilities@e0000 {
                compatible = "fsl,b4860-device-config", "fsl,qoriq-device-config-2.0";
        };

diff --git a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
index 142ac862cacfd2b1362ebf508ca9e11f9237fb3e..1948f73fd26b0d65c4955dac885166ef537cd917 100644 (file)
--- a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
@@ -66,24 +66,28 @@
                        reg = <0 1>;
                        clocks = <&mux0>;
                        next-level-cache = <&L2>;
+                       fsl,portid-mapping = <0x80000000>;
                };
                cpu1: PowerPC,e6500@2 {
                        device_type = "cpu";
                        reg = <2 3>;
                        clocks = <&mux0>;
                        next-level-cache = <&L2>;
+                       fsl,portid-mapping = <0x80000000>;
                };
                cpu2: PowerPC,e6500@4 {
                        device_type = "cpu";
                        reg = <4 5>;
                        clocks = <&mux0>;
                        next-level-cache = <&L2>;
+                       fsl,portid-mapping = <0x80000000>;
                };
                cpu3: PowerPC,e6500@6 {
                        device_type = "cpu";
                        reg = <6 7>;
                        clocks = <&mux0>;
                        next-level-cache = <&L2>;
+                       fsl,portid-mapping = <0x80000000>;
                };
        };
 };

diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
index 4f6e48277c46170bb806bbb17e41c2887de4054f..1a54ba71f6852e1925376eba5fec5825098141dd 100644 (file)
--- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
@@ -158,7 +158,7 @@
        };
 
        corenet-cf@18000 {
-               compatible = "fsl,b4-corenet-cf";
+               compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
                reg = <0x18000 0x1000>;
                interrupts = <16 2 1 0>;
                fsl,ccf-num-csdids = <32>;
@@ -168,6 +168,7 @@
        iommu@20000 {
                compatible =  "fsl,pamu-v1.0", "fsl,pamu";
                reg = <0x20000 0x4000>;
+               fsl,portid-mapping = <0x8000>;
                #address-cells = <1>;
                #size-cells = <1>;
                interrupts = <

diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index f99d74ff11b4f95cf3a312b1aa7645c6df6c24a9..793669baa13e08b81cfea8790ece2ff3c3f4155e 100644 (file)
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -343,7 +343,7 @@
        };
 
        corenet-cf@18000 {
-               compatible = "fsl,corenet-cf";
+               compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
                reg = <0x18000 0x1000>;
                interrupts = <16 2 1 31>;
                fsl,ccf-num-csdids = <32>;
@@ -353,6 +353,7 @@
        iommu@20000 {
                compatible = "fsl,pamu-v1.0", "fsl,pamu";
                reg = <0x20000 0x6000>;
+               fsl,portid-mapping = <0x8000>;
                interrupts = <
                        24 2 0 0
                        16 2 1 30>;

diff --git a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
index 0b8ccc5b4a46575088acd599a01fd0aef3909d98..d2f157edbe81c57e3f16f19cd06839b8b20cac2a 100644 (file)
--- a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
@@ -69,72 +69,84 @@
                        reg = <0 1>;
                        clocks = <&mux0>;
                        next-level-cache = <&L2_1>;
+                       fsl,portid-mapping = <0x80000000>;
                };
                cpu1: PowerPC,e6500@2 {
                        device_type = "cpu";
                        reg = <2 3>;
                        clocks = <&mux0>;
                        next-level-cache = <&L2_1>;
+                       fsl,portid-mapping = <0x80000000>;
                };
                cpu2: PowerPC,e6500@4 {
                        device_type = "cpu";
                        reg = <4 5>;
                        clocks = <&mux0>;
                        next-level-cache = <&L2_1>;
+                       fsl,portid-mapping = <0x80000000>;
                };
                cpu3: PowerPC,e6500@6 {
                        device_type = "cpu";
                        reg = <6 7>;
                        clocks = <&mux0>;
                        next-level-cache = <&L2_1>;
+                       fsl,portid-mapping = <0x80000000>;
                };
                cpu4: PowerPC,e6500@8 {
                        device_type = "cpu";
                        reg = <8 9>;
                        clocks = <&mux1>;
                        next-level-cache = <&L2_2>;
+                       fsl,portid-mapping = <0x40000000>;
                };
                cpu5: PowerPC,e6500@10 {
                        device_type = "cpu";
                        reg = <10 11>;
                        clocks = <&mux1>;
                        next-level-cache = <&L2_2>;
+                       fsl,portid-mapping = <0x40000000>;
                };
                cpu6: PowerPC,e6500@12 {
                        device_type = "cpu";
                        reg = <12 13>;
                        clocks = <&mux1>;
                        next-level-cache = <&L2_2>;
+                       fsl,portid-mapping = <0x40000000>;
                };
                cpu7: PowerPC,e6500@14 {
                        device_type = "cpu";
                        reg = <14 15>;
                        clocks = <&mux1>;
                        next-level-cache = <&L2_2>;
+                       fsl,portid-mapping = <0x40000000>;
                };
                cpu8: PowerPC,e6500@16 {
                        device_type = "cpu";
                        reg = <16 17>;
                        clocks = <&mux2>;
                        next-level-cache = <&L2_3>;
+                       fsl,portid-mapping = <0x20000000>;
                };
                cpu9: PowerPC,e6500@18 {
                        device_type = "cpu";
                        reg = <18 19>;
                        clocks = <&mux2>;
                        next-level-cache = <&L2_3>;
+                       fsl,portid-mapping = <0x20000000>;
                };
                cpu10: PowerPC,e6500@20 {
                        device_type = "cpu";
                        reg = <20 21>;
                        clocks = <&mux2>;
                        next-level-cache = <&L2_3>;
+                       fsl,portid-mapping = <0x20000000>;
                };
                cpu11: PowerPC,e6500@22 {
                        device_type = "cpu";
                        reg = <22 23>;
                        clocks = <&mux2>;
                        next-level-cache = <&L2_3>;
+                       fsl,portid-mapping = <0x20000000>;
                };
        };
 };

diff --git a/arch/powerpc/boot/dts/t4240emu.dts b/arch/powerpc/boot/dts/t4240emu.dts
index ee24ab335598092da00863590dfc7052767fb3be..bc12127a03fbfe339b882496a89cfdbafcedfdbb 100644 (file)
--- a/arch/powerpc/boot/dts/t4240emu.dts
+++ b/arch/powerpc/boot/dts/t4240emu.dts
@@ -60,63 +60,75 @@
                        device_type = "cpu";
                        reg = <0 1>;
                        next-level-cache = <&L2_1>;
+                       fsl,portid-mapping = <0x80000000>;
                };
                cpu1: PowerPC,e6500@2 {
                        device_type = "cpu";
                        reg = <2 3>;
                        next-level-cache = <&L2_1>;
+                       fsl,portid-mapping = <0x80000000>;
                };
                cpu2: PowerPC,e6500@4 {
                        device_type = "cpu";
                        reg = <4 5>;
                        next-level-cache = <&L2_1>;
+                       fsl,portid-mapping = <0x80000000>;
                };
                cpu3: PowerPC,e6500@6 {
                        device_type = "cpu";
                        reg = <6 7>;
                        next-level-cache = <&L2_1>;
+                       fsl,portid-mapping = <0x80000000>;
                };
 
                cpu4: PowerPC,e6500@8 {
                        device_type = "cpu";
                        reg = <8 9>;
                        next-level-cache = <&L2_2>;
+                       fsl,portid-mapping = <0x40000000>;
                };
                cpu5: PowerPC,e6500@10 {
                        device_type = "cpu";
                        reg = <10 11>;
                        next-level-cache = <&L2_2>;
+                       fsl,portid-mapping = <0x40000000>;
                };
                cpu6: PowerPC,e6500@12 {
                        device_type = "cpu";
                        reg = <12 13>;
                        next-level-cache = <&L2_2>;
+                       fsl,portid-mapping = <0x40000000>;
                };
                cpu7: PowerPC,e6500@14 {
                        device_type = "cpu";
                        reg = <14 15>;
                        next-level-cache = <&L2_2>;
+                       fsl,portid-mapping = <0x40000000>;
                };
 
                cpu8: PowerPC,e6500@16 {
                        device_type = "cpu";
                        reg = <16 17>;
                        next-level-cache = <&L2_3>;
+                       fsl,portid-mapping = <0x20000000>;
                };
                cpu9: PowerPC,e6500@18 {
                        device_type = "cpu";
                        reg = <18 19>;
                        next-level-cache = <&L2_3>;
+                       fsl,portid-mapping = <0x20000000>;
                };
                cpu10: PowerPC,e6500@20 {
                        device_type = "cpu";
                        reg = <20 21>;
                        next-level-cache = <&L2_3>;
+                       fsl,portid-mapping = <0x20000000>;
                };
                cpu11: PowerPC,e6500@22 {
                        device_type = "cpu";
                        reg = <22 23>;
                        next-level-cache = <&L2_3>;
+                       fsl,portid-mapping = <0x20000000>;
                };
        };
 };
@@ -213,7 +225,7 @@
        };
 
        corenet-cf@18000 {
-               compatible = "fsl,corenet-cf";
+               compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
                reg = <0x18000 0x1000>;
                interrupts = <16 2 1 31>;
                fsl,ccf-num-csdids = <32>;
@@ -223,6 +235,7 @@
        iommu@20000 {
                compatible = "fsl,pamu-v1.0", "fsl,pamu";
                reg = <0x20000 0x6000>;
+               fsl,portid-mapping = <0x8000>;
                interrupts = <
                        24 2 0 0
                        16 2 1 30>;